MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 15

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
1.1
1.2
INTRODUCTION
The MC145572 U–interface transceiver is a single chip device for the Integrated Services Digital Net-
work Basic Access Interface that conforms to the American National Standard ANSI T1.601–1992.
The device, which can be configured for LT (Line Termination) or NT (Network Termination) applica-
tions, performs all necessary Layer 1 functions while utilizing 2B1Q line coding.
The MC145572 is a redesign of the MC145472 and MC14LC5472 U–interface transceivers. The inter-
nal signal processing algorithms are the same as for the original MC145472 to maintain its industry–
leading performance. The control and time division multiplex interfaces have been significantly
enhanced to serve the needs of the growing ISDN (Integrated Services Digital Network) marketplace.
The use of the latest process technologies permits the MC145572 to be made available in 44–lead
PLCC and TQFP packages.
The MC145572 is designed to be easily retrofit into existing MC145472/MC14LC5472 designs with
minimal software and hardware changes. New designs can take advantage of enhanced digital inter-
face features of the MC145572, such as the timeslot assigner and the availability of superframe align-
ment signals. Software that implements analog loopbacks or Superframer–to–Deframer loopbacks
may have to be changed. See Section 5.6.
The MC145572 can operate in many different modes. The control of these various modes is provided
via special purpose pins and the Serial Control Port (SCP) or the Parallel Control Port (PCP). The
SCP conforms to the Motorola Serial Control Peripheral Interface standard, an industry standard serial
microprocessor interface. The PCP is a standard microprocessor bus port. The designer may choose
between using the General Circuit Interface (GCI) or the Motorola Interchip Digital Link (IDL)–type
time division 2B+D data interface. A timeslot assigner is also provided on the MC145572.
The customer data crossing the U–reference point consists of two 64 kbps B channels and one
16 kbps D channel in each direction. Maintenance and framing overhead is also included for a total
160 kbps data (80 Kbaud signalling) rate.
The specifications for the pullable crystal have been relaxed.
SUPPLEMENTAL DOCUMENTATION
In addition to descriptions of the ISDN network and basic MC145572 device functionality, this document
also contains several appendices:
Appendix A, MC145572EVK ISDN U–Interface Transceiver Evaluation Kit , provides a brief over-
view of the extremely versatile MC145572EVK, which is available to assist with design–in of the
MC145572. All developers of MC145572–based products are strongly encouraged to make use of
this inexpensive, but valuable tool.
Appendix B, Component Sourcing , lists specifications and potential sources for key external compo-
nents such as line interface transformers.
Appendix C, Printed Circuit Board Layout , provides recommendations for the printed circuit board
(PCB) layout.
Appendix D, Eye Pattern Generator , details design information to construct an eye pattern generator.
Appendix E, Line Interface Circuit Component Value Calculations , provides a design example
on how to calculate component values for the line interface circuit.
Appendix F, Applications , provides an example of how to configure two MC145572 U–interface trans-
ceivers as a repeater and how to connect MC14LC5540 ADPCM or MC14LC5480 PCM codecs for
pair gain applications.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
MC145572
INTRODUCTION
1
1–1