MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 91

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
D
D
DCL
FSR
DCL
FSR
FSX
FSX
5.4.3
D
D
out
out
Ç Ç
Ç Ç Ç Ç
in
Ç Ç Ç Ç Ç Ç Ç Ç
in
Ç Ç Ç Ç Ç Ç Ç Ç
B1
B1
B1
DON'T CARE
GCI 2B+D Operation
By setting OR6(b3), GCI Mode Enable to a 1, the IDL2 interface is configured to accept GCI interface
timing. In this mode, only 2B+D data is transferred between MC145572 and GCI interface. The other
bits in the GCI frame are ignored. Four signal pins are available in this mode: DCL, FSC, D in , and
D out . Control and status information for MC145572 is provided through SCP or PCP. DCL is a 2X
bit clock, D in accepts data from the IDL2 interface to be transmitted onto the U–interface, D out trans-
mits data received from the U–interface onto the IDL2 interface, and FSC is the 8 kHz frame syn-
chronization pulse. D out is driven only when 2B+D data is output from MC145572. During all other
bit times of the GCI frame, D out is high impedance. For applications having a multiplexed GCI frame
structure, Overlay register OR5 bits 2:0 are used to program the active GCI channel in the multiplex.
Figure 5–23 shows the GCI data format that is transferred over the IDL2 interface. See Chapter 8
for more details, if an application requires full GCI capability.
B1
B1
B1
B1
B1
B1
Figure 5–22. IDL2 Interface Timing in Long Frame, 10–Bit Frames
B1
B1
B1
B1
B1
B1
B1
B1
Freescale Semiconductor, Inc.
B1
B1
For More Information On This Product,
B1
B1
B1
B1
B1
B1
Figure 5–22a. 10–Bit Mode, Master
B1
B1
Figure 5–22b. 10–Bit Mode, Slave
B1
D
Go to: www.freescale.com
D
D
Ç Ç
Ç Ç Ç Ç
B1
B2
B1
MC145572
B2
B2
B2
B1
B2
B2
B1
B2
B2
B2
B2
D
Ç Ç
Ç Ç
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
D
Ç Ç Ç Ç Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç Ç Ç Ç Ç
D
D
B2
B2
B2
HIGH IMPEDANCE
HIGH IMPEDANCE
DON'T CARE
B2
Ç Ç Ç Ç
Ç Ç Ç Ç
D
5–19