MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 155

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
Procedure LTISR1()
/*
PURPOSE:
The interrupt service routine LTISR1 checks for Linkup with Super frame Sync or for an
Error Indication. If linkup is achieved, the febe and nebe counters are cleared and the M4
act bit is set to a 1. A check is made for correct reception of the eoc message by the NT1.
Correct reception is indicated when the received eoc message in R6 is the same as the eoc
message originally written to R6. This is per ANSI T1.601–1992. Note that this is one of
many possible implementations. Note that the M4 channel act bit towards the NT is set to a
1 only if the LT is receiving M4 act bit equal to 1 from the NT. This is per ANSI
T1.601–1992 section 6.4.6.4. If the Error Indication status bit, NR1(b2), is set to 1,
appropriate measures can be taken.
It is not necessary to reset the MC145572 after an activation failure occurs. A reset only
needs to be applied after initial power up.
*/
BEGIN
END
IF NR3(b3) = 1 THEN
BEGIN
END
IF NR3(b1) = 1 /* Test for M4 Channel Interrupt */
BEGIN
END
IF NR3(b2) = 1 THEN
BEGIN
END
return();
IF NR1 = B THEN
ELSE IF NR1 = 4 THEN
BEGIN
END
IF BR1(b7) = 1 AND
last received BR1(b7) = 0 THEN
BEGIN
END
ELSE
If the value read from R6
is the same as the last value
written to R6 then the NT1
executed the eoc message
correctly. Take appropriate
measures
If the value read from R6 is
not the same as the last value
written to R6 then the NT1 did
not execute the eoc message
correctly. Take appropriate
measures
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processor;
NR4 <– 0;
* report failed
BR4 <– 00;
BR5 <– 00;
BR0(b7) <– 1;
NR2(b0) <– 1;
handle other M4 channel
status changes here
activation attempt
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/* Test for activation interrupt */
/* Indication) */
/* handle other M4 status changes */
/* Test for eoc channel interrupt */
MC145572
/* Test for successful activation */
/* Test for failed activation (Error
/* Disable interrupts. */
/* test for act bit 0 to 1 transition */
/* Clear febe Counter */
/* Clear nebe Counter */
/* Send M4 act = 1 status to NT */
/* Enable data transparency at LT */
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