MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 109

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
5.6.6
Procedure to turn off analog loopback when the NT/LT pin is connected to V SS (LT mode).
External Analog Loopbacks in Systems Having Multiple
MC145572s
Systems having multiple NT mode U transceivers on a TDM bus come in two types of architectures.
The external analog loopback can be done on only one MC145572 at a time.
Procedure to perform the MC145572 external analog loopback while in NT slave mode.
To turn off the loopback.
BR10 = $01
OR8 = $00
OR9 = $00
BR10 = $00
In LT mode, the enabling/disabling of the SFAX pin is only required if the pin has not been
tied to ground through a 10 k
System Type No. 1: One U transceiver is configured as the TDM master and the others are
configured as TDM slaves.
System Type No. 2: All U transceivers are configured as TDM slaves. One U transceiver is
selected to provide a locked system clock from which is derived the DCL and FSR/FSX signals
that are provided to all U transceivers. Typically, in these systems there is a mux that allows
the locked clock to be selected from one of the U transceivers. This allows any transceiver to
provide the master clock. The clock source can come from the FREQREF pin (see OR8(b4)
description), BUFXTAL pin, or SYSCLK pin. See Section 5.6.4 for further background material.
System Type No. 1: The transceiver that the loopback test is performed on is put into master
mode. The others are put into slave mode.
System Type No. 2: Enable the mux to select its reference clock source from the transceiver on
which the loopback test is being performed.
Make sure that there is a 10 k pulldown resistor on the SFAX pin.
Set BR8(b0) = 1, to put the selected MC145572 into LT mode.
Wait 5 seconds for the MC145572 on–chip PLL to stabilize.
Configure the IDL bus or timeslot assigner for the bus format required to send/receive data with
the MC145572.
The MC145572 is ready for loopback test when NR1 reads as $0B.
BR10 = $01
OR9 = $20
BR10 = $00
NR2 = $01
BR10 = $01
OR9 = $00
BR10 = $00
Freescale Semiconductor, Inc.
For More Information On This Product,
Enable Overlay Register set.
Turn off SFAX pin (only required for applications that do not
have the 10 k
Turn off Analog Loopback bit.
Disable Overlay Register set.
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MC145572
resistor.
Pulldown Resistor).
NOTE
5–37