MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 41

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
4.2.2
4.3.1
4.3
Bit Description Legend
Each bit described in the following sections has a read/write indicator associated with it. This indicator,
shown in the lower right corner of each bit, shows what type of bit resides there. The options are
described in Table 4–4.
NIBBLE REGISTERS
NR0: Reset and Power-Down Register
This register contains read/write control bits. All bits are cleared on Hardware Reset (RESET), but
are unaffected by Software Reset (NR0(b3)). This register is write–only when the U–interface trans-
ceiver is in Absolute Power–Down mode (NR0(b1)).
Software Reset
This bit forces the U–interface transceiver into a reset state. Setting this bit to 1 causes a software
reset. To allow the transceiver to resume operation, this bit must be cleared by either writing a 0 to
it or asserting hardware reset. Reset must be asserted for at least six 20.48 MHz clock periods. There
must be a 20.48 MHz clock at XTAL in for the MC145572 to reset correctly. This bit has no effect on
the contents of NR0 and BR10.
Power–Down Enable
When this bit is set to 1 and the U–interface transceiver is searching for a wake–up tone from the
far–end tranceiver, the MC145572 enters the Power–Down mode. In Power–Down mode, the
MC145572 transmit drivers and the time division multiplex interface circuitry for both IDL2 and GCI
operation are turned off. This bit must be cleared to 0 before enabling the MC145572 to perform any
non–activation related functions other than waiting for a wakeup tone. The MC145572 automatically
exits from Power–Down mode on one of three conditions:
1. A wakeup tone is detected on the U–interface.
Indicator
ro/wo
rw
ro
NR0
Byte register 14 includes a bit (BR14(b6)) that converts all of the write–only (wo) registers
to read/write registers for diagnostic purposes. If not specified, a register is not affected
by BR14(b6) and operates as discussed for all modes.
Read–Only/Write–Only
Freescale Semiconductor, Inc.
Read–Only
Read/Write
For More Information On This Product,
SOFTWARE
Type
NR0 should not be modified while device is in GCI mode.
RESET
b3
Go to: www.freescale.com
Table 4–4. Bit Read/Write Indicator
rw
A Read/Write bit may be written to by the external microcontroller. The
information that is read back will be the data that was written.
A Read–Only bit may be read by the external microcontroller. Writing to it has no
effect unless otherwise specified in the text. When the text says that an “ro” bit is
set or cleared, this operation is performed internally.
A Read–Only/Write–Only bit may be written to by the external microcontroller.
However, the value that is read back by the external microcontroller is not
necessarily the value that was written. An “ro” bit is set and cleared by some
internal operation in the U–interface transceiver.
MC145572
POWER-DOWN
ENABLE
b2
CAUTION
NOTE
rw
POWER-DOWN
Description
ABSOLUTE
b1
rw
RETURN TO
NORMAL
b0
rw
4–5