MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 44

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

4–8
4.3.3
NR2: Activation Control Register
Register NR2 contains activation/deactivation control bits. All bits are cleared on Software Reset
(NR0(b3)) or Hardware Reset (RESET).
Activation Request
When this bit is set to 1 and the U–interface transceiver is in ANSI T1.601–1992 defined “Full Reset”,
the transceiver will begin an activation. The external microcontroller never needs to set this bit to 0.
The bit is internally set to 0 whenever Transparent/Activation in Progress (NR1(b0)) is set to a 1, when-
ever TL is transmitted in the LT mode, or on hardware or software reset. If the activation fails for any
reason, the Activation Request bit must be set to 1 once again to initiate another activation attempt.
The transceiver self–activates if an incoming tone is detected when in LT or NT mode. Once activation
starts, the MC145572 automatically clears this bit. Do not continuously reassert this bit. It only needs
to be set once per activation attempt.
Deactivation Request
When this bit is set to 1 in the LT mode; upon reaching Linkup = 1, the U–interface transceiver will
halt transmission and proceed to ANSI T1.601 defined “Tear Down” state H10 or J10, following three
complete superframes. The deactivation sequence can be aborted if the Deactivate Request bit is
set back to 0 prior to completion of three transmitted superframes. In NT mode, the Deactivate Request
bit is set to a 1 by the external microcontroller in response to a received dea bit on the M4 channel,
which indicates to the U–interface transceiver that this is a normal deactivation attempt. In this case,
the MC145572 will reactivate in the warm start mode. In NT mode, the MC145572 automatically clears
this bit upon deactivation. In LT mode, this bit is not cleared prior to starting the next activation and
must be cleared when the MC145572 is deactivated.
Superframe Update Disable
This bit tells the Superframe Framer whether or not to update the maintenance bits M40 – M47, M50,
M51, and M60, which are being transmitted with the new bits that have been loaded in the control
registers. In normal operation, this bit is always set to 0, allowing the transmitted bits to be updated
at the transmit superframe boundary with the maintenance channel data in registers BR0 and
BR2(b7:b4). The exception to this is during a deactivation in the LT mode. The transceiver can be
forced to send exactly three superframes of updated M4 channel data before it deactivates. In that
sequence of operations, the Superframe Update Disable bit is first set to 1. The M4 maintenance
bits are then written by the external microcontroller to the proper setting for deactivation. The Super-
frame Update Disable bit is set to a 0 and the Deactivate Request bit in NR2(b2) is set to a 1 by
the external microcontroller. This guarantees that the U–interface transceiver will send exactly three
superframes of updated M4 data before the activation state controller shuts everything down. Note
that Superframe Update Disable does not affect the transmitted eoc, febe, or crc maintenance bits.
Customer Enable
When this bit is set to 1, it permits the U–interface transceiver to pass 2B + D data transparently. During
the activation procedure, the Customer Enable bit normally is set to 0. Only after the U–interface trans-
ceiver has reached full–duplex operation and the act bits of the M4 maintenance channel have been
properly exchanged, should the Customer Enable bit be set to a 1. See BR9(b5:b4), M4 Control Bits,
for another way to achieve 2B + D data transparency.
NR2
NR2 normally is not written to in GCI mode; if necessary, NR2 can be written to, but bits
b3 and b2 should always be written as 0 while the device is in GCI mode.
Activation Request
Freescale Semiconductor, Inc.
For More Information On This Product,
b3
Go to: www.freescale.com
rw
Deactivation Request
MC145572
b2
CAUTION
rw
Superframe Update
Disable
b1
rw
Customer Enable
b0
MOTOROLA
rw