MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 25

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MC145572PB

Manufacturer Part Number
MC145572PB
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC145572PB

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant

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MOTOROLA
20.48 MHz
BUFXTAL
EYEDATA
DCHCLK
SCPCLK
CLKOUT
CLKOUT
SYSCLK
RxBCLK
TxBCLK
SCPEN
DCH out
SCPRx
SCPTx
TxSFS
DCH in
TSEN
MCU/
Mode
4.096
15.36
SFAR
SFAX
SCP
IRQ
20.48 MHz
Pin Name
MCU/PCP
SYSCLK
TxSFS
Mode
SFAR
TSEN
SFAX
R/W
IRQ
CS
D0
D1
D2
D3
D4
D5
D6
D7
BUFXTAL
CLKOUT
CLKOUT
FREF out
CLKSEL
Mode
OUT1
OUT2
4.096
15.36
GCI
IN1
IN2
S2
S1
S0
Table 3–3. Digital Data Interface Pins (See Section 3.3.4)
Freescale Semiconductor, Inc.
For More Information On This Product,
TQFP
44
17
18
21
22
23
24
4
3
1
2
8
9
Pin No.
Go to: www.freescale.com
PLCC
21
20
18
19
17
34
35
38
39
40
41
25
26
In serial port, MCU mode, SCPEN is the active low SCP enable input.
In parallel port, MCU mode, CS is the active low chip select.
In full GCI mode, defined when MCU/GCI = 0, this input is IN1.
In serial port, MCU mode, SCPCLK is the serial control port clock input.
In parallel port, MCU mode, R/W is the read versus write indication to the
parallel port.
In full GCI mode, defined when MCU/GCI = 0, this input is IN2.
In serial port, MCU mode, SCPRx is the serial control port data input.
In parallel port, MCU mode, D0 is the LSB of the parallel data bus.
In full GCI mode, defined by MCU/GCI = 0, OUT1 is an output reflecting the
state of bit 5 as set in BR7.
In serial port, MCU mode, SCPTx is the serial control port data output.
In parallel port, MCU mode, this is signal D1 of the parallel data bus.
In full GCI mode, defined by MCU/GCI = 0, OUT2 is an output reflecting the
state of bit 6 as set in BR7
Open–drain active low output for microcontroller interrupt.
4.096 MHz clock out.
In parallel port, MCU mode, this is signal D2 of the parallel data bus.
15.36 MHz clock out. Not synchronized to recovered clock in the NT mode.
In parallel port, MCU mode, this is signal D3 of the parallel data bus.
This is a square wave output from the 20.48 MHz oscillator and it is not
synchronized to the recovered clock in the NT mode.
In parallel port, MCU mode, this is signal D4 of the parallel data bus.
In serial port, MCU mode, this pin may carry either EYEDATA or DCHCLK.
In parallel port, MCU mode, this is signal D5 of the parallel data bus.
In full GCI mode, this pin is the S2 input.
In serial port, MCU mode, this pin may carry either TxBCLK or DCH in .
TxBCLK is an 80 kHz clock output, aligned and synchronized to the
transmitted baud.
DCH in is the D channel port serial data input.
In parallel port, MCU mode, this is signal D6 of the parallel data bus.
In full GCI mode, operating as a GCI slave, this pin provides 2.048 MHz or
512 kHz synchronized clock output.
In serial port, MCU mode, this pin may carry either RxBCLK or DCH out .
RxBCLK is an 80 kHz clock output, aligned and synchronized to the received
baud.
DCH out is the D channel port serial data output.
In parallel port, MCU mode, D7 is the MSB of the parallel data bus.
In full GCI mode, operating as a GCI master, CLKSEL selects between
512 kHz and 2.048 MHz for DCL. CLKSEL = 1 selects 2.048 MHz.
In either MCU mode, this pin may carry either SYSCLK, 20.48 MHz, SFAR, or
TSEN outputs.
SYSCLK is a 10.24 MHz clock for sampling EYEDATA.
SFAR is the receive data superframe alignment output in the NT and LT
modes.
TSEN is an active low open–drain buffer enable output, used for enabling a
bus driver to buffer MCU data out from the MC145572, onto a PCM highway.
TSEN is active only when D out is active.
In full GCI mode, this pin is the S1 input.
In either MCU mode, this pin may carry either TxSFS output, or SFAX
input/output.
When this pin is unused, connect a 100 k resistor to V SS in LT mode.
TxSFS is provided for compatibility to the MC145472, which provides an
absolute transmit superframe reference.
SFAX is the transmit data superframe alignment input in the LT mode, or
superframe alignment output in the NT mode.
In LT mode, SFAX can also be an output.
In full GCI mode, this pin is the S0 input.
MC145572
Pin Description
3–3

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