MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 83

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
5.3.2
PCP Mode
In PCP mode, the MC145572 is configured to have a single address byte wide data port for access to
the internal register set. A read/write pin (R/W) and chip select pin (CS) are provided to enable read or
write accesses to the data port. For an external microcontroller, such as the MC68302, to access an
individual nibble, byte, or overlay register; a sequence of write and read operations is required. The
first access is always a write cycle that writes a pointer and internal read/write indicator to the
MC145572. The pointer byte contains the Nibble or Byte register address and for the case of the
Nibble register, writes the data to be written. This initial write may be followed by up to two read ac-
cesses or one write access. An open drain IRQ output pin is provided for interrupting an external MCU
when a change of status is detected by the MC145572. Figure 5–13 shows pin configurations to oper-
ate the MC145572 in MCU mode using the PCP for access to the register set.
NOTE: In LT mode, the 10 k resistor on SFAX/TxSFS is required when none of these pin functions
8 kHz REFERENCE
20.48 MHz
10 k
is enabled.
0.1 F
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 5–13. MCU Mode with PCP Configuration
V DD
17
21
20
18
19
34
35
38
39
40
41
25
26
33
32
42
Go to: www.freescale.com
8
7
IRQ
CS
R/W
D0
D1
D2
D3
D4
D5
D6
D7
SFAR
SFAX
V ref P
V ref N
XTAL in
XTAL out
FREQREF
MC145572
MC145572FN
MCU/GCI
PAR/SER
V DD I/O
V DD I/O
V DD Rx
V SS I/O
V SS I/O
RESET
CAP3V
V DD Tx
V SS Rx
V SS Tx
NT/LT
V DD
D out
V SS
V SS
FSR
FSX
DCL
RxN
TxN
RxP
M/S
TxP
D in
1
22
44
2
11
10
3
4
24
23
37
36
14
15
43
13
16
27
28
31
30
29
9
12
5
6
+ 5 V
COUPLING
0 V/V DD
8 kHz
8 kHz
V DD
V DD
CIRCUIT
0.1 F
V DD
T
R
5–11