MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 56

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

4–20
4.4.9
BR8: Transmit Framer and Mode Control Register
This register contains controls used for test operations such as external loopbacks, Superframe Fram-
er Control and State information, and NT/LT mode control. All write capable bits are cleared on a
Software Reset (NR0(b3)) or Hardware Reset (RESET). Bits b7 – b4 and b0, are read–only/write–only.
To read the write–only bits, it is necessary to set BR14(b6) to 1. When BR10(b0) = 1, this register
is replaced by Register OR8.
Frame Steering
When this bit is a 1, the Frame Control 2:0 bits take over control of the Superframe Framer’s mode
of operation.
Frame Control 2:0
These bits set the mode of operation for the Superframe Framer when the Frame Steering bit is 1.
Table 4–8 shows the mode the Superframe Framer will go into, based on the three Frame Control
bits and the Frame Steering bit.
Frame State 3:0
These bits provide the external microcontroller with the current state of the U–interface transceiver’s
Superframe Framer, regardless of whether the Superframe Framer is being controlled by the external
microcontroller or internally by the Automatic Activation Controller. The meaning of Frame State 2:0
maps directly onto the meaning of Frame Control 2:0. Frame State 3 is 0 at all times, except during
TN of an NT activation sequence. State transitions are always made on frame or superframe bound-
aries.
crc Corrupt
When set to 1, this bit forces the transmitted crc to be inverted. It is used for eoc maintenance pro-
cedures and to force an outgoing corrupt crc in digital loop carrier systems. As the transmit framer
Steering
Frame
BR8
b7
1
1
1
1
1
1
1
1
0
Steering
State 3
Frame
Frame
b7
b6
0
0
0
0
1
1
1
1
Freescale Semiconductor, Inc.
wo
Frame Control 2:0
ro
For More Information On This Product,
Don’t Care
Control 2
State 2
Frame
Frame
b5
0
0
1
1
0
0
1
1
b6
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wo
ro
Table 4–8. Frame Control Modes
Control 1
b4
State 1
Frame
Frame
0
1
0
1
0
1
0
1
b5
MC145572
wo
ro
Six frames of 10 kHz tone followed
Generates a single quat every basic frame which alternates over all four
of the 2B1Q symbols.
Superframe Framer free runs the scrambler with no synchronization
words.
The Superframe Framer output is determined by the state of the
Automatic Activation Controller.
Control 0
State 0
Frame
Frame
b4
wo
ro
by SN1
Superframe Framer Mode of Operation
SN0
SN2
SN3
NT
Reserved
Corrupt
crc
b3
rw
10 kHz tone
40 kHz tone
Scrambler
Reserved
Match
b2
rw
Reserved
Receive
Window
Disable
b1
SL0
SL1
SL2
SL3
rw
LT
MOTOROLA
NT/LT
NT/LT
Invert
Mode
b0
wo
ro