MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 145

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
NOTES:
G
TO ACTIVATED
A
B
C
D
E
F
H
J
I
rx_uoa=0
U-ONLY
1. An “x” in the NR1 bit means that the bit remains unchanged from its value in a previous state.
2. The transmitted M4 channel bits remain unchanged between states unless a change is explicitly indicated.
3. SL3T is SL3 with transparent data transmission.
4. The state “Normal Operation” is the state in which the MC145572 operates when it is fully activated, transmitting 2B+D with
5. Linkup = NR1(b3), SFS = NR1(b1), aip_tp = NR1(b0).
6. Warm start is only enabled when the MC145572 transitions from the four states that enable warm start directly to the “Tear
transparency enabled.
Down” state. Any other transition disables warm start.
rx_dea=0
SFS=1, aip_tp=1
ENABLE WARM START
SFS=1
SAVE COEFFICIENTS
DCL TURNED ON
480 ms TIMEOUT
OPERATION
TO TEAR DOWN
act=1, sai=1
NR1 = 1011
Tx = SN3T
NORMAL
IND = AI
NR1 = 1011
rx_dea=0
IND = AR
Tx = SN3
Wait_AI
rx_SL0
rx_dea=0
START 480 ms TIMER
TO SET EI
NR1 = 1000
IND = RSY
Tx = SN3
Wait_AI
SFS=0, aip_tp=0
RSY
480 ms TIMEOUT
ENABLE WARM START
rx_dea=1
SAVE COEFFICIENTS
SFS=1, aip_tp=1
NR1 = 1011
Tx = SN3T
NORMAL
rx_dea=0
IND = AI
Figure 8–18. NT Mode GCI State Diagram (Sheet 2 of 2)
aip_tp=0
Freescale Semiconductor, Inc.
aip_tp=1
For More Information On This Product,
START 480 ms TIMER
SFS=0, aip_tp=0
OPERATION
NR1 = 1000
IND = RSY
NORMAL
Tx = SN3
RSY
rx_SL0
TO TEAR DOWN
OPERATION
Go to: www.freescale.com
NR1 = 1010
IND = EI2
NORMAL
Tx = SN3
EI2
SFS=1
MC145572
NR1 = xxxx
IND = XX
Tx = SLx
Non–crossing lines to or
from states.
IND = C/I Channel Indication Message
NR1 = Value of Nibble Register NR1
Tx = Current Transmitted Signal
Normal Operation State
Erroneous Condition or
Device Reset State
Transition State
Action taken, followed by
immediate exit of state
Key to State Diagram
Name of State
Action Taken on Entry
Exit Condition
8–21