PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 138

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F47J53 FAMILY
REGISTER 9-17:
REGISTER 9-18:
DS39964B-page 138
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CCP10IP
R/W-1
U-0
—
CCP10IP:CCP4IP: CCP<10:4> Interrupt Priority bits
1 = High priority
0 = Low priority
CCP3IP: ECCP3 Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
CM3IP: Comparator3 Interrupt Priority bit
1 = High priority
0 = Low priority
TMR8IP: TMR8 to PR8 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR6IP: TMR6 to PR6 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5IP: TMR5 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5GIP: TMR5 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1GIP: TMR1 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
CCP9IP
R/W-1
U-0
—
IPR4: PERIPHERAL INTERRUPT PRIORITY REGISTER 4 (ACCESS F90h)
IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5 (ACCESS F99h)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
CCP8IP
CM3IP
R/W-1
R/W-1
TMR8IP
CCP7IP
R/W-1
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP6IP
TMR6IP
R/W-1
R/W-1
CCP5IP
TMR5IP
R/W-1
R/W-1
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
TMR5GIP
CCP4IP
R/W-1
R/W-1
TMR1GIP
CCP3IP
R/W-1
R/W-1
bit 0
bit 0