PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 399

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

23.5.4
The
(Register 23-10) contains the enable bits for each of
the USB error interrupt sources. Setting any of these
bits will enable the respective error interrupt source in
the UEIR register to propagate into the UERR bit at
the top level of the interrupt logic.
REGISTER 23-10: UEIE: USB ERROR INTERRUPT ENABLE REGISTER (BANKED F37h)
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
BTSEE
R/W-0
USB
USB ERROR INTERRUPT ENABLE
REGISTER (UEIE)
Error
BTSEE: Bit Stuff Error Interrupt Enable bit
1 = Bit stuff error interrupt is enabled
0 = Bit stuff error interrupt is disabled
Unimplemented: Read as ‘0’
BTOEE: Bus Turnaround Time-out Error Interrupt Enable bit
1 = Bus turnaround time-out error interrupt is enabled
0 = Bus turnaround time-out error interrupt is disabled
DFN8EE: Data Field Size Error Interrupt Enable bit
1 = Data field size error interrupt is enabled
0 = Data field size error interrupt is disabled
CRC16EE: CRC16 Failure Interrupt Enable bit
1 = CRC16 failure interrupt is enabled
0 = CRC16 failure interrupt is disabled
CRC5EE: CRC5 Host Error Interrupt Enable bit
1 = CRC5 host error interrupt is enabled
0 = CRC5 host error interrupt is disabled
PIDEE: PID Check Failure Interrupt Enable bit
1 = PID check failure interrupt is enabled
0 = PID check failure interrupt is disabled
U-0
—
Interrupt
W = Writable bit
‘1’ = Bit is set
U-0
Enable
—
register
BTOEE
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F47J53 FAMILY
DFN8EE
R/W-0
As with the UIE register, the enable bits only affect the
propagation of an interrupt condition to the micro-
controller’s interrupt logic. The flag bits are still set by
their interrupt conditions, allowing them to be polled
and serviced without actually generating an interrupt.
CRC16EE
R/W-0
x = Bit is unknown
CRC5EE
R/W-0
DS39964B-page 399
PIDEE
R/W-0
bit 0