PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 488

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18F47J53 FAMILY
POP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39964B-page 488
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TOS
Stack (1 level down)
TOS
PC
Q1
operation
Pop Top of Return Stack
POP
None
(TOS)  bit bucket
None
The TOS value is pulled off the return
stack and is discarded. The TOS value
then becomes the previous value that
was pushed onto the return stack.
This instruction is provided to enable
the user to properly manage the return
stack to incorporate a software stack.
1
1
POP
GOTO
0000
No
Q2
0000
NEW
POP TOS
=
=
=
=
value
Q3
0031A2h
014332h
014332h
NEW
0000
operation
No
Q4
0110
Preliminary
PUSH
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TOS
PC
PC
TOS
Stack (1 level down)
Q1
PC + 2 onto
return stack
Push Top of Return Stack
PUSH
None
(PC + 2)  TOS
None
The PC + 2 is pushed onto the top of
the return stack. The previous TOS
value is pushed down on the stack.
This instruction allows implementing a
software stack by modifying TOS and
then pushing it onto the return stack.
1
1
PUSH
PUSH
0000
Q2
 2010 Microchip Technology Inc.
0000
operation
=
=
=
=
=
No
Q3
345Ah
0126h
345Ah
0124h
0126h
0000
operation
No
Q4
0101

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