PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 271

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
REGISTER 19-2:
In addition to the expanded range of modes available
through the CCPxCON and ECCPxAS registers, the
ECCP modules have two additional registers associated
with Enhanced PWM operation and auto-shutdown
features. They are:
• ECCPxDEL – Enhanced PWM Control
• PSTRxCON – Pulse Steering Control
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-3
bit 2-0
C3TSEL1
R/W-0
C3TSEL<1:0>: ECCP3 Timer Selection bits
00 = ECCP3 is based off of TMR1/TMR2
01 = ECCP3 is based off of TMR3/TMR4
10 = ECCP3 is based off of TMR3/TMR6
11 = ECCP3 is based off of TMR3/TMR8
C2TSEL<2:0>: ECCP2 Timer Selection bits
000 = ECCP2 is based off of TMR1/TMR2
001 = ECCP2 is based off of TMR3/TMR4
010 = ECCP2 is based off of TMR3/TMR6
011 = ECCP2 is based off of TMR3/TMR8
1xx = Reserved; do not use
C1TSEL<2:0>: ECCP1 Timer Selection bits
000 = ECCP1 is based off of TMR1/TMR2
001 = ECCP1 is based off of TMR3/TMR4
010 = ECCP1 is based off of TMR3/TMR6
011 = ECCP1 is based off of TMR3/TMR8
1xx = Reserved; do not use
C3TSEL0
R/W-0
CCPTMRS0: ECCP1/2/3 TIMER SELECT 0 REGISTER (BANKED F52h)
W = Writable bit
‘1’ = Bit is set
C2TSEL2
R/W-0
C2TSEL1
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
C2TSEL0
PIC18F47J53 FAMILY
R/W-0
C1TSEL2
R/W-0
x = Bit is unknown
C1TSEL1
R/W-0
DS39964B-page 271
C1TSEL0
R/W-0
bit 0

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