PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 225

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.2
Timer3 and Timer5 can operate in these modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
• Timer with Gated Control
FIGURE 15-1:
 2010 Microchip Technology Inc.
Note 1:
SOSCGO
T1OSCEN
T3OSCEN
T5OSCEN
TxG
From Timer4/6
Match PR4/6
Comparator 1
Output
Comparator 2
Output
Timer3/5 Operation
TxGSS<1:0>
2:
3:
T1OSO/T1CKI
ST buffer is a high-speed type when using T1CKI.
Timerx registers increment on rising edge.
Synchronization does not operate while in Sleep.
T
X
OSCEN
TxGPOL
T1OSI
TxCKI
Set flag bit
TMRxIF on
Overflow
TIMER3/5 BLOCK DIAGRAM
00
10
11
01
T1OSC/SOSC
TMRxON
TxGTM
TMRxH
EN
OUT
TMRx
(1)
TxG_IN
(2)
D
R
CK
TMRxL
Q
Q
1
0
Preliminary
TMRxCS<1:0>
0
1
TxGGO/TxDONE
Q
Internal
Internal
F
OSC
Clock
Clock
F
OSC
EN
PIC18F47J53 FAMILY
/4
D
The operating mode is determined by the clock select
bits, TMRxCSx (TxCON<7:6>). When the TMRxCSx bits
are cleared (= 00), Timer3/5 increments on every internal
instruction cycle (F
Timer3/5 clock source is the system clock (F
when it is ‘10’, Timer3/5 works as a counter from the
external clock from the TxCKI pin (on the rising edge after
the first falling edge) or the Timer1 oscillator.
Single Pulse
Acq. Control
10
01
00
TxCLK
TxGSPM
TxCKPS<1:0>
TxSYNC
Prescaler
1, 2, 4, 8
TMRxON
0
1
2
0
1
OSC
Internal
F
Clock
OSC
TxGVAL
/4). When TMRxCSx = 01, the
TMRxGE
/2
Q1
Synchronized
Synchronize
Clock Input
Interrupt
D
EN
det
det
Sleep Input
Q
(3)
DS39964B-page 225
Set
TMRxGIF
T3GCON
Data Bus
OSC
RD
), and