PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 96

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F47J53 FAMILY
TABLE 6-4:
DS39964B-page 96
FAEh
FADh
FACh
FABh
FAAh
FA9h
FA8h
FA7h
FA6h
FA5h
FA4h
FA3h
FA2h
FA1h
FA0h
F9Fh
F9Eh
F9Dh
F9Ch
F9Bh
F9Ah
F99h
F98h
F97h
F96h
F95h
F94h
F93h
F92h
F91h
F90h
F8Fh
F8Eh
F8Dh
F8Ch
F8Bh
F8Ah
F89h
F88h
F87h
F86h
F85h
F84h
F83h
F82h
F81h
F80h
Legend:
Note 1:
Addr.
2:
3:
TXREG1
TXSTA1
RCSTA1
SPBRG2
RCREG2
TXREG2
TXSTA2
EECON2
EECON1
IPR3
PIR3
PIE3
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
RCSTA2
OSCTUNE
T1GCON
IPR5
PIR5
T3GCON
TRISE
TRISD
TRISC
TRISB
TRISA
PIE5
IPR4
PIR4
PIE4
LATE
LATD
LATC
LATB
LATA
DMACON1
OSCCON2
DMACON2
HLVDCON
PORTE
PORTD
PORTC
PORTB
PORTA
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved, do not modify
Implemented only for 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and PIC18LF47J53).
Implemented only for 28-pin devices (PIC18F26J53, PIC18F27J53, PIC18LF26J53 and PIC18LF27J53).
Implemented only for devices with 128 Kbyte of program memory (PIC18F27J53, PIC18F47J53, PIC18LF27J53 and PIC18LF47J53).
File Name
(1)
(1)
(1)
(1)
(1)
(1)
REGISTER FILE SUMMARY (PIC18F47J53 FAMILY) (CONTINUED)
EUSART1 Transmit Register
EUSART2 Baud Rate Generator Register Low Byte
EUSART2 Receive Register
EUSART2 Transmit Register
Flash Self-Program Control Register (not a physical register)
DLYCYC3
VDIRMAG
PMPIP
PMPIF
PMPIE
TMR1GE
TMR3GE
CCP10IP
CCP10IF
CCP10IE
SSCON1
OSCFIP
OSCFIF
OSCFIE
INTSRC
SSP2IP
SSP2IE
TRISD7
TRISC7
TRISB7
TRISA7
SSP2IF
LATD7
LATC7
LATB7
CSRC
CSRC
RDPU
LATA7
SPEN
SPEN
Bit 7
RD7
RC7
RB7
RA7
—
—
—
—
—
—
—
(1)
(1)
(1)
SOSCRUN
DLYCYC2
SSCON0
T1GPOL
T3GPOL
CCP9IE
BCL2IP
BCL2IE
TRISD6
TRISC6
TRISB6
TRISA6
CCP9IP
CCP9IF
BCL2IF
BGVST
PLLEN
CM2IP
CM2IF
CM2IE
LATD6
LATC6
LATB6
LATA6
REPU
ADIP
ADIF
ADIE
Bit 6
RX9
RX9
RD6
RC6
RB6
RA6
TX9
TX9
—
—
—
—
—
—
DLYCYC1
WPROG
CCP8IP
CCP8IE
TRISD5
TRISB5
TRISA5
CCP8IF
T1GTM
T3GTM
CM1IP
CM1IE
CM3IP
CM3IE
RC2IP
RC2IF
RC2IE
CM1IF
RC1IP
RC1IF
RC1IE
CM3IF
LATD5
LATB5
LATA5
TXINC
IRVST
SREN
SREN
TXEN
TXEN
TUN5
Bit 5
RD5
RC5
RB5
RA5
—
—
—
—
—
—
Preliminary
SOSCDRV
DLYCYC0
T1GSPM
T3GSPM
HLVDEN
TMR8IP
TMR8IF
TRISD4
TMR8IE
CCP7IP
CCP7IF
CCP7IE
TRISB4
USBIP
USBIE
LATD4
LATB4
RXINC
CREN
USBIF
CREN
SYNC
SYNC
FREE
TX2IP
TX2IF
TX2IE
TX1IP
TX1IF
TX1IE
TUN4
Bit 4
RD4
RC4
RB4
—
—
—
—
—
—
—
—
DUPLEX1
SOSCGO
T1DONE
T3DONE
WRERR
INTLVL3
TMR4IP
TMR4IF
TMR4IE
T1GGO/
TMR6IP
T3GGO/
TMR6IE
CCP6IP
HLVDL3
SENDB
ADDEN
SENDB
BCL1IP
BCL1IE
SSP1IP
SSP1IE
ADDEN
TMR6IF
TRISD3
TRISB3
TRISA3
CCP6IF
CCP6IE
BCL1IF
SSP1IF
LATD3
LATB3
LATA3
TUN3
Bit 3
RD3
RB3
RA3
—
—
—
—
—
—
DUPLEX0
INTLVL2
CTMUIP
CTMUIF
CTMUIE
T1GVAL
T3GVAL
HLVDL2
HLVDIP
HLVDIE
CCP1IP
CCP1IF
CCP1IE
TMR5IP
TMR5IF
TRISD2
TRISC2
TMR5IE
CCP5IP
CCP5IF
CCP5IE
HLVDIF
TRISE2
TRISB2
TRISA2
WREN
LATD2
LATC2
PRISD
BRGH
BRGH
LATE2
LATB2
LATA2
FERR
FERR
TUN2
Bit 2
RD2
RC2
RE2
RB2
RA2
DLYINTEN
 2010 Microchip Technology Inc.
TMR3GIP
TMR3GIE
TMR5GIP
TMR5GIE
TMR3GIF
TMR5GIF
INTLVL1
T1GSS1
T3GSS1
TMR3IP
TMR3IF
TMR3IE
TMR2IP
TMR2IF
TMR2IE
TRISD1
TRISC1
CCP4IP
CCP4IF
CCP4IE
HLVDL1
TRISE1
TRISB1
TRISA1
LATD1
LATC1
OERR
OERR
LATE1
LATB1
LATA1
TRMT
TRMT
TUN1
Bit 1
RD1
RC1
RE1
RB1
RA1
WR
—
TMR1GIP
TMR1GIF
TMR1GIE
T1GSS0
T3GSS0
INTLVL0
RTCCIP
RTCCIF
RTCCIE
TMR1IP
TMR1IE
HLVDL0
CCP2IP
CCP2IF
CCP2IE
TMR1IF
TRISE0
TRISD0
TRISC0
TRISB0
TRISA0
CCP3IP
CCP3IF
CCP3IE
DMAEN
LATE0
LATD0
LATC0
LATB0
LATA0
RX9D
RX9D
TUN0
TX9D
TX9D
Bit 0
RE0
RD0
RC0
RB0
RA0
—
—
xxxx xxxx
0000 0010
0000 000x
0000 0000
0000 0000
0000 0000
0000 0010
---- ----
--00 x00-
1111 1111
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
0000 000x
0000 0000
0000 0x00
--11 1111
--00 0000
0000 0x00
00-- -111
1111 1111
1111 1111
1111 1111
111- 1111
--00 0000
1111 1111
0000 0000
0000 0000
---- -xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxx- xxxx
0000 0000
-0-1 01--
0000 0000
0000 0000
---- -xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxx- xxxx
POR, BOR
Value on