PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 151

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 10-5:
TABLE 10-6:
 2010 Microchip Technology Inc.
PORTB
LATB
TRISB
INTCON
INTCON2
INTCON3
ANCON1
REFOCON
CM3CON
PADCFG1
RTCCFG
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTB.
RB7/CCP7/
KBI3/PGD/
RP10
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
Note 1:
Name
2:
3:
Pin
input/output; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Pins are configured as analog inputs by default on POR. Using these pins for digital inputs requires setting
the appropriate bits in the ANCON1 register.
All other pin functions are disabled when ICSP™ or ICD is enabled.
Available only on 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and PIC18LF47J53).
GIE/GIEH
TRISB7
VBGEN
RTCEN
INT2IP
LATB7
ROON
RBPU
CON
PORTB I/O SUMMARY (CONTINUED)
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Bit 7
RB7
Function
—
CCP7
RP10
KBI3
PGD
RB7
PEIE/GIEL
INTEDG0
Setting
TRISB6
INT1IP
TRIS
LATB6
Bit 6
COE
RB6
0
1
1
0
1
x
x
1
0
—
—
—
—
I/O
O
O
O
O
O
I
I
I
I
RTCWREN RTCSYNC HALFSEC
INTEDG1
ROSSLP
TMR0IE
TRISB5
INT3IE
LATB5
CPOL
Bit 5
RB5
—
—
Type
DIG
TTL
DIG
TTL
DIG
DIG
I/O
ST
ST
ST
Preliminary
INTEDG2
LATB<7> data output.
PORTB<7> data input; weak pull-up when the RBPU bit is
cleared.
Capture input.
Interrupt-on-change pin.
Serial execution data output for ICSP and ICD operation.
Serial execution data input for ICSP and ICD operation.
Remappable Peripheral Pin 10 input.
PCFG12
EVPOL1
Compare/PWM output.
Remappable Peripheral Pin 10 output.
TRISB4
ROSEL
INT0IE
INT2IE
LATB4
Bit 4
RB4
—
PIC18F47J53 FAMILY
INTEDG3
PCFG11
EVPOL0
RODIV3
TRISB3
LATB3
INT1IE
RBIE
Bit 3
RB3
—
RTSECSEL1 RTSECSEL0 PMPTTL
Description
PCFG10
TMR0IP
RODIV2
TMR0IF
TRISB2
RTCOE
LATB2
INT3IF
CREF
Bit 2
RB2
RTCPTR1
RODIV1
TRISB1
PCFG9
INT0IF
INT3IP
INT2IF
LATB1
CCH1
Bit 1
RB1
DS39964B-page 151
RTCPTR0
RODIV0
TRISB0
PCFG8
INT1IF
LATB0
CCH0
RBIF
RBIP
Bit 0
RB0
(2)
(2)