PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 431

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
27.3.2
There is a small amount of capacitance from the inter-
nal A/D Converter sample capacitor as well as stray
capacitance from the circuit board traces and pads that
affect the precision of capacitance measurements. A
measurement of the stray capacitance can be taken by
making sure the desired capacitance to be measured
has been removed. The measurement is then
performed using the following steps:
1.
2.
3.
4.
5.
6.
where I is known from the current source measurement
step, t is a fixed delay and V is measured by performing
an A/D conversion.
 2010 Microchip Technology Inc.
Initialize the A/D Converter and the CTMU.
Set EDG1STAT (= 1).
Wait for a fixed delay of time, t.
Clear EDG1STAT.
Perform an A/D conversion.
Calculate the stray and A/D sample capacitances:
C
OFFSET
CAPACITANCE CALIBRATION
=
C
STRAY
+
C
AD
=
I t 
 V 
Preliminary
PIC18F47J53 FAMILY
This measured value is then stored and used for
calculations of time measurement or subtracted for
capacitance measurement. For calibration, it is
expected that the capacitance of C
approximately known. C
An iterative process may need to be used to adjust the
time, t, that the circuit is charged to obtain a reasonable
voltage reading from the A/D Converter. The value of t
may be determined by setting C
value, then solving for t. For example, if C
theoretically calculated to be 11 pF, and V is expected
to be 70% of V
or 63 s.
See Example 27-3 for a typical routine for CTMU
capacitance calibration.
(4 pF + 11 pF) • 2.31V/0.55 A
DD
or 2.31V, then t would be:
AD
is approximately 4 pF.
OFFSET
DS39964B-page 431
STRAY
to a theoretical
+ C
STRAY
AD
is
is

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