PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 147

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 10-3:
TABLE 10-4:
 2010 Microchip Technology Inc.
PORTA
LATA
TRISA
ANCON0
CMxCON
CVRCON
WDTCON
HLVDCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA.
Note 1:
RA5/AN4/C1INC/
SS1/HLVDIN/
RCV/RP2
OSC2/CLKO/
RA6
OSC1/CLKI/RA7
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
Note 1:
Name
Pin
These bits are only available in 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and
PIC18LF47J53).
input/output; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
This bit is only available on 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and
PIC18LF47J53).
VDIRMAG
PCFG7
REGSLP
PORTA I/O SUMMARY (CONTINUED)
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
CVREN
TRIS7
LAT7
Bit 7
CON
Function
RA7
HLVDIN
C1INC
OSC2
CLKO
OSC1
RCV
CLKI
RA5
AN4
SS1
RP2
RA6
RA7
(1)
PCFG6
LVDSTAT
CVROE
BGVST
Setting
TRIS6
LAT6
TRIS
Bit 6
COE
RA6
0
1
1
0
1
1
1
1
0
x
x
1
0
1
1
1
0
(1)
I/O
O
O
O
O
O
O
O
PCFG5
I
I
I
I
I
I
I
I
I
I
ULPLVL
TRISA5
CVRR
IRVST
CPOL
LAT5
Bit 5
RA5
Type
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
TTL
DIG
DIG
TTL
DIG
TTL
DIG
I/O
ST
(1)
Preliminary
HLVDEN
EVPOL1
VBGOE
CVRSS
PCFG4
LATA<5> data output; not affected by analog input.
PORTA<5> data input; disabled when analog input is enabled.
A/D Input Channel 4. Default configuration on POR.
Comparator 1 Input C.
Slave select input for MSSP1.
High/Low-Voltage Detect external trip point reference input.
External USB transceiver RCV input.
Remappable Peripheral Pin 2 input.
Remappable Peripheral Pin 2 output.
Main oscillator feedback output connection (HS mode).
System cycle clock output (F
modes.
PORTA<6> data input.
LATA<6> data output.
Main oscillator input connection.
Main clock input connection.
PORTA<6> data input.
LATA<6> data output.
Bit 4
—
—
—
PIC18F47J53 FAMILY
EVPOL0
HLVDL3
TRISA3
PCFG3
CVR3
LAT3
Bit 3
RA3
DS
Description
HLVDL2
TRISA2
PCFG2
ULPEN
CREF
CVR2
LAT2
Bit 2
RA2
OSC
/4) in RC and EC Oscillator
ULPSINK
HLVDL1
TRISA1
PCFG1
CCH1
CVR1
LAT1
Bit 1
RA1
DS39964B-page 147
SWDTEN
HLVDL0
TRISA0
PCFG0
CCH0
CVR0
LAT0
Bit 0
RA0