PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 261

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
18.1
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two eight-bit registers: CCPRxL (low
byte) and CCPRxH (high byte). All registers are both
readable and writable.
18.1.1
The CCP modules utilize Timers 1 through 8, varying
with the selected mode. Various timers are available to
the CCP modules in Capture, Compare or PWM
modes, as shown in Table 18-1.
TABLE 18-2:
TABLE 18-3:
 2010 Microchip Technology Inc.
Note 1:
Note 1:
C4TSEL
C8TSEL
<1:0>
<1:0>
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
CCP Module Configuration
Compare
Compare
Capture/
Capture/
Do not use the reserved bit configuration.
Do not use the reserved bit configuration.
CCP8
CCP4
CCP MODULES AND TIMER
RESOURCES
TMR1
TMR3
TMR3
TMR1
TMR1
TMR1
Mode
Mode
Reserved
Reserved
TIMER ASSIGNMENTS FOR CCP MODULES 4, 5, 6 AND 7
TIMER ASSIGNMENTS FOR CCP MODULES 8, 9 AND 10
TMR2
TMR4
TMR6
TMR2
TMR4
TMR6
Mode
Mode
PWM
PWM
(1)
(1)
C8TSEL
C5TSEL0
<1:0>
0 0
0 1
1 0
1 1
Devices with 64 Kbyte
0
1
Compare
Capture/
CCP8
Compare
TMR1
TMR1
TMR1
Capture/
Mode
CCP5
TMR1
TMR5
Reserved
Mode
CCPTMRS2 Register
CCPTMRS1 Register
TMR2
TMR4
TMR6
Mode
PWM
Preliminary
(1)
TMR2
TMR4
Mode
PWM
C9TSEL0
C6TSEL0
PIC18F47J53 FAMILY
0
1
TABLE 18-1:
The assignment of a particular timer to a module is
determined by the Timer to CCP enable bits in the
CCPTMRSx
Register 18-3.) All of the modules may be active at
once and may share the same timer resource if they
are configured to operate in the same mode
(Capture/Compare or PWM), at the same time.
The CCPTMRS1 register selects the timers for CCP
modules, 7, 6, 5 and 4, and the CCPTMRS2 register
selects the timers for CCP modules, 10, 9 and 8. The
possible configurations are shown in Table 18-2 and
Table 18-3.
0
1
CCP Mode
Compare
Capture
PWM
Compare
Capture/
CCP9
TMR1
TMR1
Compare
Mode
Capture/
CCP6
TMR1
TMR5
Mode
registers.
TMR2
TMR4
Mode
PWM
Timer2, Timer4, Timer 6 or Timer8
CCP MODE – TIMER
RESOURCE
TMR2
TMR2
Mode
PWM
Timer1, Timer3 or Timer 5
C10TSEL0
Timer Resource
C7TSEL
(See
<1:0>
0 0
0 1
1 0
1 1
0
1
Register 18-2
DS39964B-page 261
CCP10
Compare
Compare
Capture/
Capture/
CCP7
TMR1
TMR5
TMR5
TMR5
TMR1
Mode
Mode
Reserved
Mode
TMR2
TMR4
TMR6
TMR8
TMR2
PWM
Mode
PWM
(1)
and

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