PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 580

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F47J53 FAMILY
SSPOV.............................................................................. 335
SSPOV Status Flag........................................................... 335
SSPxSTAT Register
Stack Full/Underflow Resets ............................................... 85
SUBFSR............................................................................ 505
SUBFWB........................................................................... 494
SUBLW ............................................................................. 495
SUBULNK ......................................................................... 505
SUBWF ............................................................................. 495
SUBWFB........................................................................... 496
SWAPF ............................................................................. 496
T
Table Pointer Operations (table) ....................................... 112
Table Reads/Table Writes........................................... 85, 375
TBLRD .............................................................................. 497
TBLWT .............................................................................. 498
Timer0 ............................................................................... 205
Timer1 ............................................................................... 209
Timer2 ............................................................................... 219
Timer3 ............................................................................... 221
DS39964B-page 580
.......................................................................................... 292
Serial Data In ............................................................ 292
Serial Data Out ......................................................... 292
Slave Mode ............................................................... 298
Slave Select .............................................................. 292
Slave Select Synchronization ................................... 298
SPI Clock .................................................................. 297
SSPxBUF Register ................................................... 297
SSPxSR Register...................................................... 297
Typical Connection ................................................... 296
R/W Bit .............................................................. 315, 318
Associated Registers ................................................ 207
Operation .................................................................. 206
Overflow Interrupt ..................................................... 207
Prescaler ................................................................... 207
Prescaler Assignment (PSA Bit) ............................... 207
Prescaler Select (T0PS2:T0PS0 Bits) ...................... 207
Reads and Writes in 16-Bit Mode ............................. 206
Source Edge Select (T0SE Bit)................................. 206
Source Select (T0CS Bit) .......................................... 206
16-Bit Read/Write Mode............................................ 213
Associated Registers ................................................ 218
Clock Source Selection ............................................. 211
Gate .......................................................................... 215
Interrupt..................................................................... 214
Operation .................................................................. 211
Oscillator ........................................................... 209, 213
Resetting, Using the ECCP Special
TMR1H Register ....................................................... 209
TMR1L Register ........................................................ 209
Use as a Clock Source ............................................. 214
Associated Registers ................................................ 220
Interrupt..................................................................... 220
Operation .................................................................. 219
Output ....................................................................... 220
PR2 Register............................................................. 266
TMR2 to PR2 Match Interrupt ................................... 266
16-Bit Read/Write Mode............................................ 226
Associated Registers ................................................ 231
Gate .......................................................................... 226
Operation .................................................................. 225
Oscillator ........................................................... 221, 226
Switching Assignment....................................... 207
Layout Considerations ...................................... 214
Event Trigger .................................................... 215
Preliminary
Timer4
Timer4/6/8......................................................................... 233
Timing Diagrams
Overflow Interrupt ............................................. 221, 230
Special Event Trigger (ECCP) .................................. 230
TMR3H Register ....................................................... 221
TMR3L Register........................................................ 221
PR4/6/8 Register ...................................................... 233
TMR4/6/8 Register.................................................... 233
TMRx to PRx Match Interrupt ................................... 234
Associated Registers ................................................ 235
Interrupt .................................................................... 234
MSSP Clock Shift ..................................................... 234
Operation .................................................................. 233
Output ....................................................................... 234
Postscaler. See Postscaler, Timer4/6/8.
Prescaler. See Prescaler, Timer4/6/8.
TMR4 to PR4 Match Interrupt................................... 233
A/D Conversion......................................................... 551
Asynchronous Reception.......................................... 358
Asynchronous Transmission..................................... 356
Asynchronous Transmission (Back-to-Back)............ 356
Automatic Baud Rate Calculation ............................. 354
Auto-Wake-up Bit (WUE) During
Auto-Wake-up Bit (WUE) During Sleep .................... 359
Baud Rate Generator with Clock Arbitration............. 333
BRG Overflow Sequence.......................................... 354
BRG Reset Due to SDAx Arbitration
Bus Collision During a Repeated
Bus Collision During a Repeated Start
Condition (Case 2).................................................... 342
Bus Collision During a Start Condition
Bus Collision During a Stop Condition (Case 1) ....... 343
Bus Collision During a Stop Condition (Case 2) ....... 343
Bus Collision During Start Condition
Bus Collision for Transmit and Acknowledge ........... 339
CLKO and I/O ........................................................... 536
Clock Synchronization .............................................. 326
Clock/Instruction Cycle ............................................... 86
Enhanced Capture/Compare/PWM .......................... 539
EUSARTx Synchronous Receive
EUSARTx Synchronous Transmission
Example SPI Master Mode (CKE = 0) ...................... 542
Example SPI Master Mode (CKE = 1) ...................... 543
Example SPI Slave Mode (CKE = 0) ........................ 544
Example SPI Slave Mode (CKE = 1) ........................ 545
External Clock........................................................... 534
Fail-Safe Clock Monitor ............................................ 456
First Start Bit ............................................................. 333
Full-Bridge PWM Output........................................... 280
Half-Bridge PWM Output .................................. 278, 285
High/Low-Voltage Detect Characteristics ................. 532
High-Voltage Detect (VDIRMAG = 1) ....................... 423
I
I
I
I
I
2
2
2
2
2
2C Bus Data........................................................... 546
C Acknowledge Sequence ..................................... 338
C Bus Start/Stop Bits ............................................. 546
C Master Mode (7 or 10-Bit Transmission) ............ 336
C Master Mode (7-Bit Reception)........................... 337
Normal Operation ............................................. 359
During Start Condition ...................................... 341
Start Condition (Case 1) ................................... 342
(SCLx = 0) ........................................................ 341
(SDAx Only)...................................................... 340
(Master/Slave) .................................................. 550
(Master/Slave) .................................................. 550
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