PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 267

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.4.2
The PWM duty cycle is specified by writing to the
CCPR4L register and to the CCP4CON<5:4> bits. Up
to 10-bit resolution is available. The CCPR4L contains
the eight MSbs and the CCP4CON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPR4L:CCP4CON<5:4>. The following equation is
used to calculate the PWM duty cycle in time:
EQUATION 18-2:
CCPR4L and CCP4CON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPR4H until after a match between PR2 and TMR2
occurs (that is, the period is complete). In PWM mode,
CCPR4H is a read-only register.
TABLE 18-5:
18.4.3
To configure the CCP module for PWM operation:
1.
2.
3.
4.
5.
 2010 Microchip Technology Inc.
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
PWM Duty Cycle = (CCPR4L:CCP4CON<5:4>) •
Set the PWM period by writing to the PR2
register.
Set the PWM duty cycle by writing to the
CCPR4L register and CCP4CON<5:4> bits.
Make the CCP4 pin an output by clearing the
appropriate TRIS bit.
Set the TMR2 prescale value, then enable
Timer2 by writing to T2CON.
Configure the CCP4 module for PWM operation.
PWM Frequency
PWM DUTY CYCLE
SETUP FOR PWM OPERATION
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
T
OSC
• (TMR2 Prescale Value)
2.44 kHz
FFh
16
14
9.77 kHz
Preliminary
FFh
12
4
PIC18F47J53 FAMILY
39.06 kHz
The CCPR4H register and a two-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM
operation.
When the CCPR4H and two-bit latch match TMR2,
concatenated with an internal two-bit Q clock or two
bits of the TMR2 prescaler, the CCP4 pin is cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is given by the equation:
EQUATION 18-3:
Note:
FFh
10
1
PWM Resolution (max)
If the PWM duty cycle value is longer than
the PWM period, the CCP4 pin will not be
cleared.
156.25 kHz
3Fh
1
8
312.50 kHz
=
1Fh
1
7
log
-----------------------------bits
log
DS39964B-page 267


---------------
F
F
PWM
2  
OSC
416.67 kHz


6.58
17h
1