PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 417

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
25.2
The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(see Figure 25-1) keep CV
reference source rails. The voltage reference is derived
from the reference source; therefore, the CV
changes with fluctuations in that source. The tested
absolute accuracy of the voltage reference can be
found in Section 31.0 “Electrical Characteristics”.
25.3
The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be connected to the RA2 pin if the
CVROE bit is set. Enabling the voltage reference out-
put onto RA2 when it is configured as a digital input will
increase current consumption. Connecting RA2 as a
digital output with CVRSS enabled will also increase
current consumption.
FIGURE 25-2:
TABLE 25-1:
 2010 Microchip Technology Inc.
CVRCON
CM1CON
CM2CON
CM3CON
TRISA
ANCON0
Legend: — = unimplemented, read as ‘0’, r = reserved. Shaded cells are not used with the comparator voltage
Note 1:
Name
Note 1:
Voltage Reference Accuracy/Error
Connection Considerations
reference.
These bits are only available on 44-pin devices.
R is dependent upon the Comparator Voltage Reference Configuration bits, CVRCON<5> and CVRCON<3:0>.
PCFG7
REGISTERS ASSOCIATED WITH COMPARATOR VOLTAGE REFERENCE
CVREN
TRISA7
Bit 7
CON
CON
CON
CV
Module
COMPARATOR VOLTAGE REFERENCE OUTPUT BUFFER EXAMPLE
PIC18F47J53
REF
(1)
REF
Impedance
PCFG6
Reference
CVROE
TRISA6
Voltage
from approaching the
Output
Bit 6
COE
COE
COE
R
(1)
(1)
RA2
PCFG5
REF
TRISA5
CVRR
CPOL
CPOL
CPOL
Bit 5
output
(1)
EVPOL1
EVPOL1
EVPOL1
CVRSS
PCFG4
Bit 4
PIC18F47J53 FAMILY
The RA2 pin can be used as a simple D/A output with
limited drive capability. Due to the limited current drive
capability, a buffer must be used on the voltage
reference output for external connections to V
Figure 25-2 for an example buffering technique.
25.4
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
25.5
A device Reset disables the voltage reference by
clearing bit, CVREN (CVRCON<7>). This Reset also
disconnects the reference from the RA2 pin by clearing
bit, CVROE (CVRCON<6>) and selects the high-voltage
range by clearing bit, CVRR (CVRCON<5>). The CVR
value select bits are also cleared.
EVPOL0
EVPOL0
EVPOL0
TRISA3
PCFG3
CVR3
Bit 3
Operation During Sleep
Effects of a Reset
+
TRISA2
PCFG2
CVR2
CREF
CREF
CREF
Bit 2
CV
REF
Output
TRISA1
PCFG1
CCH1
CCH1
CCH1
CVR1
Bit 1
DS39964B-page 417
TRISA0
PCFG0
CVR0
CCH0
CCH0
CCH0
Bit 0
REF
. See

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