PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 569

no-image

PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
APPENDIX A:
Revision A (December 2009)
Original data sheet for PIC18F47J53 family devices.
Revision B (June 2010)
Updates typical and maximum DC current specifica-
tions
Power-Down and Supply Current
Family (Industrial)”.
Removes all references to the LPT1OSC Configuration
bit throughout the data sheet; substitutes appropriate
references to the SOSCSEL Configuration bits.
TABLE B-1:
 2010 Microchip Technology Inc.
Max Program Memory
Oscillator options
SOSC Oscillator Options
T1CKI Clock Input
INTOSC
Timers
ECCP
CCP
SPI Fosc/8 Master Clock
Option
ADC
Peripheral Module Disable
Bits
Band Gap Voltage Reference
Output
REPU/RDPU Pull-Up Enable
Bits
Comparators
Increased Output Drive
Strength
Characteristic
in
Section 31.2
NOTABLE DIFFERENCES BETWEEN PIC18F47J53 AND PIC18F46J50 FAMILIES
REVISION HISTORY
“DC
Three, each with four input-pin selections
13 Channel, 10/12-bit conversion modes
Yes, enabled on pin RA1 by setting the
Low-power oscillator option for SOSC,
Moved to TRISE register (avoids read,
without enabling the Timer1 oscillator
Yes, allowing further power reduction
PLL can be enabled at start-up with
T1CKI can be used as a clock input
with Special Event Trigger option.
RA0 through RA5, RDx and REx
Characteristics:
VBGOE bit (WDTCON<4>)
PIC18F47J53
PIC18F47J53 Family
modify, write issues)
with run-time switch
Config bit option
Up to 8 MHz
128 Kbytes
Preliminary
Yes
8
3
7
PIC18F47J53 FAMILY
APPENDIX B:
Code for the devices in the PIC18F46J50 family can be
migrated to the PIC18F47J53 without many changes.
The differences between the two device families are
listed in Table B-1.
Requires firmware to set the PLLEN bit at
Pull-up bits configured in PORTE register
Two, each with two input-pin selections
Low-power oscillator option for SOSC,
only via Configuration bit setting
PIC18F46J50 Family
13 Channel, 10-bit only
MIGRATION FROM
PIC18F46J50 TO
PIC18F47J53
Up to 8 MHz
64 Kbytes
run time
No
No
No
No
No
5
2
0
DS39964B-page 569

Related parts for PIC18F27J53T-I/SO