PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 180

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F47J53 FAMILY
11.1
The PMP module has a total of 14 Special Function
Registers (SFRs) for its operation, plus one additional
register to set configuration options. Of these, eight
registers are used for control and six are used for PMP
data transfer.
11.1.1
The eight PMP Control registers are:
• PMCONH and PMCONL
• PMMODEH and PMMODEL
• PMSTATL and PMSTATH
• PMEH and PMEL
REGISTER 11-1:
DS39964B-page 180
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-3
bit 2
bit 1
bit 0
Note 1:
PMPEN
R/W-0
Module Registers
This register is only available on 44-pin devices.
CONTROL REGISTERS
PMPEN: Parallel Master Port Enable bit
1 = PMP enabled
0 = PMP disabled, no off-chip access performed
Unimplemented: Read as ‘0’
PSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
ADRMUX<1:0>: Address/Data Multiplexing Selection bits
11 = Reserved
10 = All 16 bits of address are multiplexed on PMD<7:0> pins
01 = Lower 8 bits of address are multiplexed on PMD<7:0> pins (only eight bits of address are
00 = Address and data appear on separate pins (only eight bits of address are available in this mode)
PTBEEN: Byte Enable Port Enable bit (16-Bit Master mode)
1 = PMBE port enabled
0 = PMBE port disabled
PTWREN: Write Enable Strobe Port Enable bit
1 = PMWR/PMENB port enabled
0 = PMWR/PMENB port disabled
PTRDEN: Read/Write Strobe Port Enable bit
1 = PMRD/PMWR port enabled
0 = PMRD/PMWR port disabled
U-0
—
available in this mode)
PMCONH: PARALLEL PORT CONTROL REGISTER HIGH BYTE (BANKED F5Fh)
W = Writable bit
‘1’ = Bit is set
PSIDL
R/W-0
ADRMUX1
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ADRMUX0
R/W-0
The
Register 11-2) control basic module operations, includ-
ing turning the module on or off. They also configure
address multiplexing and control strobe configuration.
The
Register 11-4) configure the various Master and Slave
modes, the data width and interrupt generation.
The PMEH and PMEL registers (Register 11-5 and
Register 11-6) configure the module’s operation at the
hardware (I/O pin) level.
The
Register 11-6) provide status flags for the module’s
input and output buffers, depending on the operating
mode.
PMMODE
PMSTAT
PMCON
PTBEEN
R/W-0
registers
registers
registers
 2010 Microchip Technology Inc.
x = Bit is unknown
PTWREN
R/W-0
(Register 11-1
(Register 11-5
(Register 11-3
PTRDEN
R/W-0
bit 0
and
and
and
(1)