PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 387

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
23.2.5
The USB Address register contains the unique USB
address that the peripheral will decode when active.
UADDR is reset to 00h when a USB Reset is received,
indicated by URSTIF, or when a Reset is received from
the microcontroller. The USB address must be written
by the microcontroller during the USB setup phase
(enumeration) as part of the Microchip USB firmware
support.
23.2.6
The Frame Number registers contain the 11-bit frame
number. The low-order byte is contained in UFRML,
while the three high-order bits are contained in
UFRMH. The register pair is updated with the current
frame number whenever a SOF token is received. For
the microcontroller, these registers are read-only. The
Frame Number registers are primarily used for
isochronous transfers. The contents of the UFRMH and
UFRML registers are only valid when the 48 MHz SIE
clock is active (i.e., contents are inaccurate when
SUSPND (UCON<1>) bit = 1).
23.3
USB data moves between the microcontroller core and
the SIE through a memory space known as the USB
RAM. This is a special dual access memory that is
mapped into the normal data memory space in Banks,
0 through 14 (00h to EBFh), for a total of 3.8 Kbytes
(Figure 23-4).
Bank 13 (D00h through DFFh) is used specifically for
endpoint buffer control, while Banks 0 through 12 and
Bank 14 are available for USB data. Depending on the
type of buffering being used, all but 8 bytes of Bank 13
may also be available for use as USB buffer space.
Although USB RAM is available to the microcontroller
as data memory, the sections that are being accessed
by the SIE should not be accessed by the
microcontroller. A semaphore mechanism is used to
determine the access to a particular buffer at any given
time. This is discussed in Section 23.4.1.1 “Buffer
Ownership”.
 2010 Microchip Technology Inc.
USB RAM
USB FRAME NUMBER REGISTERS
USB ADDRESS REGISTER
(UADDR)
(UFRMH:UFRML)
Preliminary
PIC18F47J53 FAMILY
FIGURE 23-4:
(USB RAM)
Banks 0
to 14
USB Data or User Data
Buffer Descriptors,
IMPLEMENTATION OF
USB RAM IN DATA
MEMORY SPACE
Access Ram
USB Data or
User Data
SFRs
DS39964B-page 387
000h
05Fh
060h
CFFh
D00h
DFFh
E00h
EBFh
EC0h
FFFh

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