PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 411

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

24.5
Each comparator has up to eight possible combina-
tions of inputs: up to four external analog inputs and
one of two internal voltage references.
Both comparators allow a selection of the signal from
pin, CxINA, or the voltage from the comparator refer-
ence (CV
compared to either CxINB, CxINC, CxIND, CTMU or
the microcontroller’s fixed internal reference voltage
(V
Table 24-1 provides the comparator inputs and outputs
tied to fixed I/O pins.
TABLE 24-1:
24.5.1
Setting the CON bit of the CMxCON register
(CMxCON<7>) enables the comparator for operation.
Clearing the CON bit disables the comparator,
minimizing current consumption.
The CCH<1:0> bits in the CMxCON register
(CMxCON<1:0>) direct either one of three analog input
pins, or the Internal Reference Voltage (V
comparator, V
ating mode, either an external or internal voltage
reference may be used. The analog signal present at
V
output of the comparator is adjusted accordingly.
 2010 Microchip Technology Inc.
IN
IRV
Comparator
- is compared to the signal at V
, 0.6V nominal) on the inverting channel.
1
2
3
Comparator Control and
Configuration
REF
COMPARATOR ENABLE AND
INPUT SELECTION
) on the non-inverting channel. This is
IN
-. Depending on the comparator oper-
COMPARATOR INPUTS AND
OUTPUTS
Input or Output
C1INA (V
C1INB (V
C1INC (V
C1IND (V
C2INA(V
C2INC (V
C2IND (V
C3INA(V
C3INC (V
C3IND (V
C2INB(V
C3INB(V
C1OUT
C2OUT
C3OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
+)
+)
+)
-)
-)
-)
-)
-)
-)
-)
-)
-)
IN
+ and the digital
Remapped
Remapped
Remapped
I/O Pin
IRV
RC2
RA0
RA3
RA5
RA2
RPn
RA1
RA2
RB2
RPn
RB3
RA2
RB1
RB0
RPn
), to the
Preliminary
PIC18F47J53 FAMILY
The external reference is used when CREF = 0
(CMxCON<2>) and V
pin. When external voltage references are used, the
comparator module can be configured to have the
reference sources externally. The reference signal
must be between V
either pin of the comparator.
The comparator module also allows the selection of an
internally generated voltage reference (CV
the comparator voltage reference module. This module
is described in more detail in Section 24.0 “Compara-
tor Module”. The reference from the comparator
voltage reference module is only available when
CREF = 1. In this mode, the internal voltage reference
is applied to the comparator’s V
24.5.2
The comparator outputs are read through the CMSTAT
register. The CMSTAT<0> reads the Comparator 1 out-
put, CMSTAT<1> reads the Comparator 2 output and
CMSTAT<2> reads the Comparator 3 output. These
bits are read-only.
The comparator outputs may also be directly output to
the RPn I/O pins by setting the COE bit (CMxCON<6>).
When enabled, multiplexers in the output path of the
pins switch to the output of the comparator.
By default, the comparator’s output is at logic high
whenever the voltage on V
The polarity of the comparator outputs can be inverted
using the CPOL bit (CMxCON<5>).
The uncertainty of each of the comparators is related to
the input offset voltage and the response time given in
the specifications, as discussed in Section 24.2
“Comparator Operation”.
Note:
The comparator input pin selected by
CCH<1:0> must be configured as an input
by setting both the corresponding TRIS bits
and PCFG bits in the ANCON1 register.
COMPARATOR ENABLE AND
OUTPUT SELECTION
SS
IN
and V
+ is connected to the CxINA
IN
DD
+ is greater than on V
, and can be applied to
IN
+ pin.
DS39964B-page 411
REF
) from
IN
-.