PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 141

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.0
Depending on the device selected and features
enabled, there are up to five ports available. Some pins
of the I/O ports are multiplexed with an alternate
function from the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not
be used as a general purpose I/O pin.
Each port has three registers for its operation. These
registers are:
• TRIS register (Data Direction register)
• PORT register (reads the levels on the pins of the
• LAT register (Data Latch)
The Data Latch (LAT register) is useful for read-modify-
write operations on the value that the I/O pins are
driving.
Figure 10-1 displays a simplified model of a generic I/O
port, without the interfaces to other peripherals.
FIGURE 10-1:
 2010 Microchip Technology Inc.
device)
Note 1: I/O pins have diode protection to V
RD LAT
Data
Bus
WR LAT
or PORT
WR TRIS
RD TRIS
RD PORT
I/O PORTS
V
SS
.
TRIS Latch
Data Latch
D
D
CK
CK
GENERIC I/O PORT
OPERATION
Q
Q
Q
EN
EN
D
DD
I/O pin
Buffer
Input
and
(1)
Preliminary
PIC18F47J53 FAMILY
10.1
When developing an application, the capabilities of the
port pins must be considered. Outputs on some pins
have higher output drive strength than others. Similarly,
some pins can tolerate higher than V
10.1.1
The output pin drive strengths vary for groups of pins
intended to meet the needs for a variety of applications.
PORTB and PORTC are designed to drive higher
loads, such as LEDs. All other ports are designed for
small loads, typically indication only. Table 10-1 sum-
marizes the output capabilities. Refer to Section 31.0
“Electrical Characteristics” for more details.
TABLE 10-1:
10.1.2
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Pins that are used
as digital only inputs are able to handle DC voltages up
to 5.5V; a level typical for digital logic circuits. In contrast,
pins that also have analog input functions of any kind
can only tolerate voltages up to V
sions beyond V
Table 10-2 summarizes the input capabilities. Refer to
Section 31.0 “Electrical Characteristics” for more
details.
TABLE 10-2:
PORTA
PORTD
PORTE
PORTB
PORTC
PORTA<7:0>
PORTB<3:0>
PORTC<2:0>
PORTE<2:0>
PORTB<7:4>
PORTC<7:6>
PORTD<7:0>
PORTC<5:4>
Port or Pin
Port
I/O Port Pin Capabilities
PIN OUTPUT DRIVE
INPUT PINS AND VOLTAGE
CONSIDERATIONS
Minimum Intended for indication.
Drive
High
DD
Tolerated
OUTPUT DRIVE LEVELS
INPUT VOLTAGE LEVELS
on these pins should be avoided.
(USB)
Input
5.5V
V
DD
Suitable for direct LED drive
levels.
Only V
tolerated.
Tolerates input levels
above V
most standard logic.
Designed for USB
specifications.
Description
DD
DS39964B-page 141
Description
DD
DD
. Voltage excur-
DD
input levels.
input levels
, useful for