PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 285

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
19.4.6
In half-bridge applications, where all power switches
are modulated at the PWM frequency, the power
switches normally require more time to turn off than to
turn on. If both the upper and lower power switches are
switched at the same time (one turned on and the other
turned off), both switches may be on for a short period
until one switch completely turns off. During this brief
interval, a very high current (shoot-through current) will
flow through both power switches, shorting the bridge
supply.
shoot-through current from flowing during switching,
turning on either of the power switches is normally
delayed to allow the other switch to completely turn off.
In Half-Bridge mode, a digitally programmable,
dead-band delay is available to avoid shoot-through
current from destroying the bridge power switches. The
delay occurs at the signal transition from the non-active
state to the active state. For an illustration, see
Figure 19-14. The lower seven bits of the associated
ECCPxDEL register (Register 19-4) sets the delay
period in terms of microcontroller instruction cycles
(T
FIGURE 19-15:
 2010 Microchip Technology Inc.
CY
Standard Half-Bridge Circuit (“Push-Pull”)
or 4 T
To
OSC
PROGRAMMABLE DEAD-BAND
DELAY MODE
).
avoid
EXAMPLE OF HALF-BRIDGE APPLICATIONS
this
potentially
PxA
PxB
destructive
Preliminary
FET
Driver
FET
Driver
PIC18F47J53 FAMILY
FIGURE 19-14:
PxA
PxB
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
(2)
(2)
V+
V-
2: Output signals are shown as active-high.
(1)
td
Pulse Width
PR2 register.
Load
Period
td
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
+
V
-
+
V
-
(1)
DS39964B-page 285
Period
(1)

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