PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 73

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 5-2:
 2010 Microchip Technology Inc.
PSTR1CON
ECCP1AS
ECCP1DEL
CCPR1H
CCPR1L
CCP1CON
PSTR2CON
ECCP2AS
ECCP2DEL
CCPR2H
CCPR2L
CCP2CON
CTMUCONH
CTMUCONL
CTMUICON
SPBRG1
RCREG1
TXREG1
TXSTA1
RCSTA1
SPBRG2
RCREG2
TXREG2
TXSTA2
EECON2
EECON1
IPR3
PIR3
PIE3
IPR2
PIR2
PIE2
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
Register
2:
3:
4:
5:
6:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
See Table 5-1 for Reset value for specific condition.
Not implemented for PIC18F2XJ53 devices.
Not implemented for “LF” devices.
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
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PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
PIC18F2XJ53
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PIC18F2XJ53
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PIC18F2XJ53
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Applicable Devices
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
PIC18F4XJ53
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PIC18F4XJ53
Preliminary
Brown-out Reset,
Wake From Deep
Power-on Reset,
00-0 0001
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
00-0 0001
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0-00 000-
0000 00xx
0000 0000
0000 0000
0000 0000
xxxx xxxx
0000 0010
0000 000x
0000 0000
0000 0000
0000 0000
0000 0010
---- ----
--00 x00-
1111 1111
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
Sleep
PIC18F47J53 FAMILY
RESET Instruction
MCLR Resets
Stack Resets
WDT Reset
00-0 0001
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
00-0 0001
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
0-00 000-
0000 00xx
0000 0000
0000 0000
0000 0000
uuuu uuuu
0000 0010
0000 000x
0000 0000
0000 0000
0000 0000
0000 0010
---- ----
--00 u00-
1111 1111
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
CM Resets
Wake-up via WDT
DS39964B-page 73
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- ----
--00 u00-
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
or Interrupt
uu-u uuuu
uuuu uuuu
uu-u uuuu
u-uu uuu-
uuuu uuuu
uuuu uuuu
(3)
(3)