PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 376

no-image

PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18F47J53 FAMILY
22.5
Figure 22-3 displays the operation of the A/D Converter
after the GO/DONE bit has been set and the
ACQT<2:0> bits are cleared. A conversion is started
after the following instruction to allow entry into Sleep
mode before the conversion begins.
Figure 22-4 displays the operation of the A/D Converter
after the GO/DONE bit has been set, the ACQT<2:0>
bits are set to ‘010’ and selecting a 4 T
time before the conversion starts.
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
After the A/D conversion is completed or aborted, a
2 T
be started. After this wait, acquisition on the selected
channel is automatically started.
REGISTER 22-6:
DS39964B-page 376
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note:
AD
U-0
Wait is required before the next acquisition can
conversion
A/D Conversions
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
Unimplemented: Read as ‘0’
TRIGSEL<1:0>: Special Trigger Select bits
11 = Selects the special trigger from the RTCC
10 = Selects the special trigger from the Timer1
01 = Selects the special trigger from the CTMU
00 = Selects the special trigger from the ECCP2
U-0
sample.
ADCTRIG: A/D TRIGGER REGISTER (BANKED EB8h)
W = Writable bit
‘1’ = Bit is set
This
U-0
AD
means
acquisition
U-0
Preliminary
the
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
22.6
A/D conversion can be started by the Special Event
Trigger of any of these modules:
• ECCP2 – Requires CCP2M<3:0> bits
• CTMU – Requires the setting of the CTTRIG bit
• Timer1 Overflow
• RTCC Alarm
To start an A/D conversion:
• The A/D module must be enabled (ADON = 1)
• The appropriate analog input channel selected
• The minimum acquisition period is set in one of
With these conditions met, the trigger sets the
GO/DONE bit and the A/D acquisition starts.
If the A/D module is not enabled (ADON = 0), the
module ignores the Special Event Trigger.
U-0
(CCP2CON<3:0>) set at 1011
(CTMUCONH<0>)
these ways:
- Timing provided by the user
- Selection made of an appropriate T
Note:
Use of the Special Event Triggers
With an ECCP2 trigger, Timer1 or Timer 3
is cleared. The timers reset to automati-
cally repeat the A/D acquisition period with
minimal
ADRESH:ADRESL to the desired loca-
tion). If the A/D module is not enabled, the
Special Event Trigger is ignored by the
module, but the timer’s counter resets.
U-0
software
 2010 Microchip Technology Inc.
x = Bit is unknown
TRIGSEL1
R/W-0
overhead
ACQ
TRIGSEL0
R/W-0
time
(moving
bit 0

Related parts for PIC18F27J53T-I/SO