PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 308

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F47J53 FAMILY
EXAMPLE 20-2:
DS39964B-page 308
InitSPIPins:
InitMSSP2:
InitSPIDMA:
movlb
bcf
bcf
bcf
bcf
bcf
bsf
movlb
bcf
movlw
movwf
movlw
movwf
bcf
bsf
movlw
movwf
movlw
movwf
movlw
movwf
movlw
movwf
movlb
clrf
movlw
movwf
bsf
movlw
movwf
movlw
movwf
0x0F
ODCON3, SPI2OD
LATB, RB2
LATB, RB1
TRISB, RB1
TRISB, RB2
TRISB, RB0
0x0E
INTCON, GIE
0x55
EECON2
0xAA
EECON2
PPSCON, IOLOCK
INTCON, GIE
0x03
RPINR21
0x0A
RPOR4
0x04
RPINR22
0x09
RPOR5
0x0F
SSP2STAT
b'00000000'
SSP2CON1
SSP2CON1, SSPEN
b'00111010'
DMACON1
b'11110000'
DMACON2
512-BYTE SPI MASTER MODE Init AND TRANSFER
;For this example, let's use RP5(RB2) for SCK2,
;RP4(RB1) for SDO2, and RP3(RB0) for SDI2
;Let’s use SPI master mode, CKE = 0, CKP = 0,
;without using slave select signalling.
;Select bank 15, for access to ODCON3 register
;Let’s not use open drain outputs in this example
;Initialize our (to be) SCK2 pin low (idle).
;Initialize our (to be) SDO2 pin to an idle state
;Make SDO2 output, and drive low
;Make SCK2 output, and drive low (idle state)
;SDI2 is an input, make sure it is tri-stated
;Now we should unlock the PPS registers, so we can
;assign the MSSP2 functions to our desired I/O pins.
;Select bank 14 for access to PPS registers
;I/O Pin unlock sequence will not work if CPU
;services an interrupt during the sequence
;Unlock sequence consists of writing 0x55
;and 0xAA to the EECON2 register.
;We may now write to RPINRx and RPORx registers
;May now turn back on interrupts if desired
;RP3 will be SDI2
;Assign the SDI2 function to pin RP3
;Let’s assign SCK2 output to pin RP4
;RPOR4 maps output signals to RP4 pin
;SCK2 also needs to be configured as an input on the
same pin
;SCK2 input function taken from RP4 pin
;0x09 is SDO2 output
;Assign SDO2 output signal to the RP5 (RB2) pin
;Done with PPS registers, bank 15 has other SFRs
;CKE = 0, SMP = 0 (sampled at middle of bit)
;CKP = 0, SPI Master mode, Fosc/4
;MSSP2 initialized
;Enable the MSSP2 module
;Full duplex, RX/TXINC enabled, no SSCON
;DLYINTEN is set, so DLYCYC3:DLYCYC0 = 1111
;Minimum delay between bytes, interrupt
;only once when the transaction is complete
Preliminary
 2010 Microchip Technology Inc.