PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 369

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
REGISTER 22-2:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-3
bit 2-0
Note 1:
R/W-0
ADFM
If the A/D FRC clock source is selected, a delay of one T
clock starts. This allows the SLEEP instruction to be executed before starting a conversion.
ADFM: A/D Result Format Select bit
1 = Right justified
0 = Left justified
ADCAL: A/D Calibration bit
1 = Calibration is performed on the next A/D conversion
0 = Normal A/D Converter operation
ACQT<2:0>: A/D Acquisition Time Select bits
111 = 20 T
110 = 16 T
101 = 12 T
100 = 8 T
011 = 6 T
010 = 4 T
001 = 2 T
000 = 0 T
ADCS<2:0>: A/D Conversion Clock Select bits
110 = F
101 = F
100 = F
011 = F
010 = F
001 = F
000 = F
ADCAL
R/W-0
ADCON1: A/D CONTROL REGISTER 1 (ACCESS FC1h)
OSC
OSC
OSC
RC
OSC
OSC
OSC
AD
AD
AD
AD
AD
AD
AD
AD
(clock derived from A/D RC oscillator)
/64
/16
/4
/32
/8
/2
W = Writable bit
‘1’ = Bit is set
ACQT2
R/W-0
ACQT1
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F47J53 FAMILY
ACQT0
R/W-0
(1)
CY
(instruction cycle) is added before the A/D
ADCS2
R/W-0
x = Bit is unknown
ADCS1
R/W-0
DS39964B-page 369
ADCS0
R/W-0
bit 0

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