PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 233

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
16.0
The Timer4/6/8 timer modules have the following
features:
• Eight-bit Timer register (TMRx)
• Eight-bit Period register (PRx)
• Readable and writable (all registers)
• Software programmable prescaler (1:1, 1:4, 1:16)
• Software programmable postscaler (1:1 to 1:16)
• Interrupt on TMRx match of PRx
The Timer4/6/8 modules have a control register shown
in Register 16-1. Timer4/6/8 can be shut off by clearing
control bit, TMRxON (TxCON<2>), to minimize power
consumption. The prescaler and postscaler selection of
Timer4/6/8 are also controlled by this register.
Figure 16-1 is a simplified block diagram of the
Timer4/6/8 modules.
16.1
Timer4/6/8 can be used as the PWM time base for the
PWM mode of the ECCP modules. The TMRx registers
are readable and writable, and are cleared on any
device Reset. The input clock (F
option of 1:1, 1:4 or 1:16, selected by control bits,
TxCKPS<1:0> (TxCON<1:0>). The match output of
TMRx goes through a four-bit postscaler (that gives a
 2010 Microchip Technology Inc.
Note: Throughout this section, generic references
TIMER4/6/8 MODULE
are used for register and bit names that are the
same – except for an ‘x’ variable that indicates
the item’s association with the Timer4, Timer6
or Timer8 module. For example, the control
register is named TxCON and refers to
T4CON, T6CON and T8CON.
Timer4/6/8 Operation
OSC
/4) has a prescale
Preliminary
PIC18F47J53 FAMILY
1:1 to 1:16 inclusive scaling) to generate a TMRx
interrupt, latched in the flag bit, TMRxIF. Table 16-1
gives each module’s flag bit.
TABLE 16-1:
The interrupt can be enabled or disabled by setting or
clearing the Timerx Interrupt Enable bit (TMRxIE),
shown in Table 16-2.
TABLE 16-2:
The prescaler and postscaler counters are cleared
when any of the following occurs:
• A write to the TMRx register
• A write to the TxCON register
• Any device Reset (Power-on Reset (POR), MCLR
A TMRx is not cleared when a TxCON is written.
Reset, Watchdog Timer Reset (WDTR) or
Brown-out Reset (BOR))
Note:
Timer Module
Timer Module
The CCP and ECCP modules use Timers
1 through 8 for some modes. The assign-
ment of a particular timer to a CCP/ECCP
module is determined by the Timer to CCP
enable bits in the CCPTMRSx registers.
For more details, see Register 19-2,
Register 18-2 and Register 18-3.
4
6
8
4
6
8
TIMER4/6/8 FLAG BITS
TIMER4/6/8 INTERRUPT
ENABLE BITS
DS39964B-page 233
PIR3<3>
PIR5<3>
PIR5<4>
Flag Bit
PIE3<3>
PIE5<3>
PIE5<4>
Flag Bit

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