PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 33

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PIC18F27J53T-I/SO

Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F27J53T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
2.4
On “F” devices, a low-ESR (< 5Ω) capacitor is required
on the V
regulator output voltage. The V
not be connected to V
F connected to ground. The type can be ceramic or
tantalum.
GRM21BF50J106ZE01 (10 F, 6.3V) or equivalent.
Designers may use Figure 2-3 to evaluate ESR
equivalence of candidate devices.
It is recommended that the trace length not exceed
0.25 inch (6 mm). Refer to Section 31.0 “Electrical
Characteristics” for additional information.
On “LF” devices, the V
a voltage supply at the V
Section 31.0
information on V
Note that the “LF” versions of these devices are
provided with the voltage regulator permanently
disabled; they must always be provided with a supply
voltage on the V
FIGURE 2-3:
 2010 Microchip Technology Inc.
0.001
Note:
0.01
0.1
10
1
0.01
Voltage Regulator Pins
(V
CAP
A
CAP
Data for Murata GRM21BF50J106ZE01 shown.
Measurements at 25°C, 0V DC bias.
/V
0.1
DDCORE
suitable
DDCORE
/V
“Electrical
DD
DDCORE
and V
Frequency (MHz)
DD
CAP
FREQUENCY vs. ESR
PERFORMANCE FOR
SUGGESTED V
1
and must use a capacitor of 10
pin.
pin to stabilize the voltage
DDCORE
/V
example
DDCORE
)
DDCORE
10
Characteristics”
CAP
.
/V
100
pin must be tied to
DDCORE
is
level. Refer to
CAP
the
1000 10,000
pin must
Murata
Preliminary
for
PIC18F47J53 FAMILY
2.5
The PGC and PGD pins are used for In-Circuit Serial
Programming™ (ICSP™) and debugging purposes. It
is recommended to keep the trace length between the
ICSP connector and the ICSP pins on the device as
short as possible. If the ICSP connector is expected to
experience an ESD event, a series resistor is recom-
mended, with the value in the range of a few tens of
ohms, not to exceed 100Ω.
Pull-up resistors, series diodes, and capacitors on the
PGC and PGD pins are not recommended as they will
interfere with the programmer/debugger communica-
tions to the device. If such discrete components are an
application requirement, they should be removed from
the circuit during programming and debugging. Alter-
natively, refer to the AC/DC characteristics and timing
requirements information in the respective device
Flash programming specification for information on
capacitive loading limits, and pin input voltage high
(V
For device emulation, ensure that the “Communication
Channel Select” (i.e., PGCx/PGDx pins) programmed
into the device matches the physical connections for
the ICSP to the Microchip debugger/emulator tool.
For
development tools connection requirements, refer to
Section 30.0 “Development Support”.
IH
) and input low (V
more
ICSP Pins
information
IL
) requirements.
on
available
DS39964B-page 33
Microchip

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