PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 220

• Manufacturer Part Number: PIC18F27J53T-I/SO
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F47J53 FAMILY
14.2
Timer2 can also generate an optional device interrupt.
The Timer2 output signal (TMR2 to PR2 match) pro-
vides the input for the 4-bit output counter/postscaler.
This counter generates the TMR2 Match Interrupt Flag,
which is latched in TMR2IF (PIR1<1>). The interrupt is
enabled by setting the TMR2 Match Interrupt Enable
bit, TMR2IE (PIE1<1>).
A range of 16 postscaler options (from 1:1 through 1:16
inclusive) can be selected with the postscaler control
bits, T2OUTPS<3:0> (T2CON<6:3>).
FIGURE 14-1:
TABLE 14-1:
DS39964B-page 220
INTCON
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
Note 1:
Name
T2OUTPS<3:0>
T2CKPS<1:0>
F
OSC
/4
Timer2 Interrupt
These bits are only available in 44-pin devices.
Timer2 Register
Timer2 Period Register
GIE/GIEH
PMPIE
PMPIP
PMPIF
Bit 7
—
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
(1)
(1)
(1)
TIMER2 BLOCK DIAGRAM
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
PEIE/GIEL
1:1, 1:4, 1:16
2
Internal Data Bus
Prescaler
ADIE
ADIP
ADIF
Bit 6
TMR0IE
RC1IE
RC1IP
RC1IF
Bit 5
4
TMR2
Preliminary
Reset
8
INT0IE
TX1IF
TX1IE
TX1IP
Bit 4
14.3
The unscaled output of TMR2 is available primarily to
the ECCP modules, where it is used as a time base for
operations in PWM mode.
Timer2 can be optionally used as the shift clock source
for the MSSP modules operating in SPI mode.
Additional information is provided in Section 20.0
“Master Synchronous Serial Port (MSSP) Module”.
Comparator
1:1 to 1:16
Postscaler
SSP1IF
SSP1IE
SSP1IP
RBIE
Bit 3
8
TMR2/PR2
Match
Timer2 Output
TMR2ON
TMR0IF
CCP1IF
CCP1IE
CCP1IP
Bit 2
 2010 Microchip Technology Inc.
PR2
8
T2CKPS1
TMR2IF
TMR2IE
TMR2IP
INT0IF
Bit 1
Set TMR2IF
TMR2 Output
(to PWM or MSSPx)
T2CKPS0
TMR1IF
TMR1IE
TMR1IP
RBIF
Bit 0