cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 110

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

4.0 Registers
4.1 Registers
4.1 Registers
This section describes the registers.
0x42—APSINT (APS Interrupt Indication Status Register)
The APSINT register indicates that a change of status has occurred within its affiliated status signals.
4-12
NOTE(S):
(1)
Bit
Dual event—A 0–> 1 and 1–> 0 transition on the corresponding status bit causes this interrupt to occur provided that this
interrupt has been enabled by the corresponding enable bit. Reading the interrupt register clears the interrupt.
7
6
5
4
3
2
1
0
Default
0
0
0
0
0
x
x
x
SigDegradeInt
B3DegradeInt
SigFailInt
PSBFInt
B3FailInt
Name
—
—
—
(1)
(1)
(1)
When a logic 1 is read, this bit indicates that the B3 error count exceeded the
Reserved, set to 0.
Reserved, set to 0.
Reserved, set to 0.
When a logic 1 is read, this bit indicates that a Protection Switching Byte Failure
(PSBF) alarm interrupt has occurred.
When a logic 1 is read, this bit indicates that the B3 error count exceeded the
programmed threshold. This bit is only valid for the CX28250-26 and above.
programmed threshold. This bit is only valid for the CX28250-26 and above.
When a logic 1 is read, this bit indicates that a Signal Fail interrupt has occurred.
When a logic 1 is read, this bit indicates that a Signal Degrade interrupt has occurred.
Mindspeed Technologies
Description
™
ATM Physical Interface (PHY) Devices
28250-DSH-002-C
CX28250