cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 144

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

4.0 Registers
4.1 Registers
0x28—RXMSK1 (Receive Cell Mask Control Register 1)
The RXMSK1 register contains the first byte of the Receive Cell Mask. It modifies the ATM cell screen in the
Receive Cell Header register. Setting a bit in the Mask register causes the corresponding bit in the received
ATM cell header to be disregarded for screening. For example, setting RXMSK1, bit 0 to 1, causes ATM cells to
be accepted with either 1 or 0 in the octet 1, bit 0 position. Combinations of Receive Header Mask bits can
select groups of ATM VPI/VCIs for reception. This mask consists of 32 bits divided among four registers.
0x29—RXMSK2 (Receive Cell Mask Control Register 2)
The RXMSK2 register contains the second byte of the Receive Cell Mask. It modifies the ATM cell screen in
the Receive Cell Header register. Setting a bit in the Mask register causes the corresponding bit in the received
ATM cell header to be disregarded for screening. For example, setting RXMSK1, bit 0 to 1, causes ATM cells to
be accepted with either 1 or 0 in the octet 1, bit 0 position. Combinations of Receive Header Mask bits can
select groups of ATM VPI/VCIs for reception. This mask consists of 32 bits divided among four registers.
4-46
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
RxMsk2[7]
RxMsk2[6]
RxMsk2[5]
RxMsk2[4]
RxMsk2[3]
RxMsk2[2]
RxMsk2[1]
RxMsk2[0]
RxMsk1[7]
RxMsk1[6]
RxMsk1[5]
RxMsk1[4]
RxMsk1[3]
RxMsk1[2]
RxMsk1[1]
RxMsk1[0]
Name
Name
Mindspeed Technologies
These bits hold the Receive Header Mask for Octet 2 of the incoming cell.
These bits hold the Receive Header Mask for Octet 1 of the incoming cell.
Description
™
Description
ATM Physical Interface (PHY) Devices
28250-DSH-002-C
CX28250