cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 147

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

CX28250
ATM Physical Interface (PHY) Devices
0x16—RXS1 (Receive S1 Overhead Status Register)
The RXS1 register provides S1 overhead status. This byte is allocated for transporting synchronization status
messages. This byte is defined only for the first STS-1 of the STS-3c signal. These messages provide an
indication of the quality level of the synchronization source of the SONET signal.
0x45—RXSEC (Receive Section Overhead Status Register)
The RXSEC register provides section overhead status.
28250-DSH-002-C
NOTE(S):
(1)
(2)
Bit
Bit
This status reflects the current state of the circuit.
This status shows an event that has occurred since the register was last read.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
x
x
x
x
x
x
x
x
0
0
x
x
x
x
x
x
RxFrmPulOut
RxFrmPulPol
SigDet
RxS1[1]
RxS1[2]
RxS1[3]
RxS1[4]
RxS1[5]
RxS1[6]
RxS1[7]
RxS1[8]
B1Err
Name
LOS
OOF
Name
LOL
LOF
(1)
(1)
(1)
(1)
(2)
(1)
When a logic 1 is read, this bit indicates that a Signal Detect condition exists on the
LSigDet input pin.
When a logic 1 is read, this bit indicates that a Loss of Lock condition exists.
When a logic 1 is read, this bit indicates that a Loss of Signal condition exists.
When a logic 1 is read, this bit indicates that an Out of Frame condition exists.
When a logic 1 is read, this bit indicates that a Loss of Frame condition exists.
When a logic 1 is read, this bit indicates that a Section BIP Error was received.
This bit selects the type of output sent to the RxFrameRef pin. When written to a logic
1, the receive octet clock (19.44 MHz) is present. When written to a logic 0, a Receive
Frame Pulse (8 kHz) is present.
This bit selects the polarity of the RxFrameRef output pin. When written to a logic 1,
the frame pulse output is an active high. When written to 0, the frame pulse output is
an active low.
Receive value for S1 Overhead Octet—bit 1 (MSB)
Receive value for S1 Overhead Octet—bit 2
Receive value for S1 Overhead Octet—bit 3
Receive value for S1 Overhead Octet—bit 4
Receive value for S1 Overhead Octet—bit 5
Receive value for S1 Overhead Octet—bit 6
Receive value for S1 Overhead Octet—bit 7
Receive value for S1 Overhead Octet—bit 8 (LSB)
Mindspeed Technologies
Description
Description
™
4.0 Registers
4.1 Registers
4-49