cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 66

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

2.0 Functional Description
2.4 ATM Cell Processor
2.4.2 ATM Cell Receiver
2-30
2.4.2.1 Cell Delineation
2.4.1.1 HEC Generation
In normal operation, the CX28250 calculates the HEC for the 4 header bytes of
each cell coming from the ATM layer. It then adds the HEC coset and inserts the
result in octet 5 of the outgoing cell. HEC calculation can be disabled by setting
bit 7 of CGEN (0x04) to a 1. When HEC is disabled, the CX28250 leaves the
contents of HEC field unchanged and transmits whatever data is placed in that
field by the ATM layer.
than 0 in the HEC field. If the first 4 bytes in the header are 0, the HEC derived
from these bytes is also 0. When this occurs and there are strings of 0s in the data,
the receiver cannot determine cell boundaries. Therefore, it is recommended that
the value 55 hex be added to the HEC before transmission. To enable the HEC
coset on the transmit side, set bit 6 in register CGEN (0x04) to 1. To enable the
receive HEC coset, set bit 4 in register CVAL (0x08) to 1.
The ATM cell receiver performs cell delineation on incoming data cells by
searching for the position of a valid HEC field within the cell. The HEC coset can
be either active or inactive, which is determined in bit 4 in the CVAL (0x08)
register.
The ATM block receives octets from the SONET block and recovers ATM cells
by means of cell delineation. Cell delineation is achieved by framing ATM cell
boundaries using HEC coding. Four consecutive bytes are chosen, and the HEC
value is calculated. The result is compared with the value of the following byte.
This “hunt” is continued by shifting this 4-byte window, one byte at a time, until
the calculated HEC value equals the received HEC value. When this occurs, a
pre-sync state is declared, and the next 48 bytes are assumed to be payload. The
ATM block calculates HEC on the 4 bytes following this payload, assuming that a
new cell has begun. If seven consecutive header blocks are found, synchronization
is declared. If any HEC calculation fails in the pre-sync state, the process begins
again (see
HECs are received. At this time, the hunt state is reinitiated.
enters the hunt mode. However, the payload is still being scrambled by the far-end
transmitter, leaving only the headers unscrambled. This means that the only
repetitive byte patterns in the data stream that meet the cell delineation criteria are
valid headers.
The HEC coset (55 hex, by ATM standards) is used to maintain a value other
When LOCD occurs, an interrupt is generated and the CX28250 automatically
Mindspeed Technologies
Figure
2-11). Synchronization is held until seven consecutive incorrect
™
ATM Physical Interface (PHY) Devices
28250-DSH-002-C
CX28250