cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 59

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

CX28250
ATM Physical Interface (PHY) Devices
2.3.4 Path Overhead
28250-DSH-002-C
2.3.3.10 M1
2.3.3.9 S1
Bits 5–8 of the Synchronization Status byte, S1, are used to convey the
synchronization status of the network elements. Bits 1–4 are currently undefined.
These status messages provide an indication of the quality of the synchronization
source of the SONET signal. This allows the network elements to determine the
best synchronization reference available and reconfigure their synchronization
references autonomously without creating timing loops. The S1 byte can be read
from RXS1 (0x16). It can be transmitted by writing to TXS1 (0x12).
Table 2-8. S1 Byte Description
The M1 byte handles automatic Line REI. It is used to inform the far end
transmitting equipment that the receiving end is getting errors on the data blocks
being sent to it. In practice, the receiver counts the block errors received in a
frame (based on B2 bytes) and uses M1 to transmit the number of errors back to
the sending equipment. An interrupt is generated when the received M1 octet
indicates error counts other than 0.
The Path Overhead checks for end-to-end communication integrity. The Section
and Line Overhead must be terminated before the Path Overhead can be accessed.
The transmit and receive functions of the Path Overhead are listed in
Table 2-9. Path Overhead Transmit and Receive Functions
J1
B3
C2
G1
PRS
STU
ST2
ST3
SMC
ST4
DUS
RES
The values of the S1 byte are described in
Acronym
Byte
Mindspeed Technologies
Stratum 1 Traceable
Sync - Traceability Unknown
Stratum 2 Traceable
Stratum 3 Traceable
SONET Min Clock Traceable
Stratum 4 Traceable
Do not use for Sync
Reserved for Network Sync Use
00 hex or 64-byte trace buffer
Calculated, error insertion
13 hex for ATM mapping
Path REI, RDI inserted
Description
Transmit
2.3 SONET/SDH Framer and Overhead Processor
™
Table
Monitor Rx trace buffer, interrupt on
change
Checked, errors counted
Checked for 01 or 13 hex
Checked, errors counted, status
1
2
3
4
5
5
7
-
Quality
Level
2-8.
2.0 Functional Description
Receive
0001
0000
0111
1010
1100
1100
1111
1110
Lower Nibble
Bits 5,6,7,8
Table
2-9.
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