cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 132

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

4.0 Registers
4.1 Registers
0x4F—OOFCNT (OOF Event Counter)
The OOFCNT counter tracks the number OOF events.
0x73—OUTLK (Out of Lock Coefficient Register)
This register sets the coefficient for the PLL when the loop is out of lock.
0x02—OUTSTAT (Output Pin Control Register)
The OUTSTAT register contains the values that are reflected on the StatOut[7:0] pins when register 0x00
(GEN), bit 2 is written to 1, enabling Status Output Pin Mode.
4-34
7–0
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
0x08 (-26)
0x15 (-23)
Default
Default
Default
0
0
0
0
0
0
0
0
x
x
x
x
x
x
x
x
Outstat[7]
Outstat[6]
Outstat[5]
Outstat[4]
Outstat[3]
Outstat[2]
Outstat[1]
Outstat[0]
OOFCnt[7]
OOFCnt[6]
OOFCnt[5]
OOFCnt[4]
OOFCnt[3]
OOFCnt[2]
OOFCnt[1]
OOFCnt[0]
Name
Name
Name
—
Value to be reflected to StatOut[7] pin.
Value to be reflected to StatOut[6] pin.
Value to be reflected to StatOut[5] pin.
Value to be reflected to StatOut[4] pin.
Value to be reflected to StatOut[3] pin.
Value to be reflected to StatOut[2] pin.
Value to be reflected to StatOut[1] pin.
Value to be reflected to StatOut[0] pin.
OOF Event counter bit 7 (MSB).
OOF Event counter bit 6.
OOF Event counter bit 5.
OOF Event counter bit 4.
OOF Event counter bit 3.
OOF Event counter bit 2.
OOF Event counter bit 1.
OOF Event counter bit 0 (LSB).
This is a control coefficient for the PLL during the acquisition phase. This register
should be reprogrammed to 0x08 in the -23 version.
Mindspeed Technologies
Description
Description
Description
™
ATM Physical Interface (PHY) Devices
28250-DSH-002-C
CX28250