cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 74

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

2.0 Functional Description
2.5 UTOPIA Interface
2.5.4 UTOPIA Multi-PHY Operation
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The CX28250 supports multi-PHY operation as described in the UTOPIA Level
specification (af-phy-0039.000; visit the web site: http://www.atmforum.com).
Three primary functions are involved in this operation: polling, selection, and
data transfer. These functions are basically the same for both the transmit and
receive sides of the UTOPIA bus. The following example describes the transmit
functions.
transmitting the port addresses on the UTxAddr lines. If a port is ready to transfer
data, it asserts UTxClAv. The controller determines which port is to transfer data
and selects that port by transmitting its address. The controller then asserts
UTxEnb* to allow the PHY to transfer data on the UTxData lines. UTxEnb* is
deasserted when the transfer is completed. Polling can continue during the data
transfer process but not during port selection. It operates independently of the
state of UTxEnb*.
the transfer, the controller must reselect the port by transmitting its address one
clock cycle before asserting UTxEnb*. The controller must ensure that the cell
transfer from this port has been completed, to avoid a start-of-cell error.
user to set up redundant or back-up PHYs with the same UTOPIA address on the
same UTOPIA bus. In this setup, both PHYs’ transmitters are enabled, sending
out identical data streams. Both PHYs’ receivers are enabled, but only one is
transferring data to the ATM device. The receiver output is disabled in the backup
PHY by writing the UtopDis, bit 5, in the UTOP2 register (0x0B) to a logic 1.
This disable places five of the backup PHY’s signals; URxData, URxPrty,
URxSOC, URxClAv, and UTxClAv; in a high-impedance state, preventing data
and control signals from being passed to the ATM layer device. The disabled
receiver flushes its FIFOs at the same rate as the enabled one, but all data it has
received, except the last four cells, is lost. Should the primary PHY device
encounter an unacceptable error rate, software can quickly enable the backup
PHY and disable the primary PHY, reducing cell loss in the transition.
NOTE:
The ATM layer UTOPIA controller polls the connected PHY ports by
To pause the data transfer process, UTxEnb* can be deasserted. To continue
The CX28250 has a UTOPIA receiver output disable feature which allows the
To facilitate multi-PHY operation, the CX28250 assigns a different
address to each of its ports by default.
Mindspeed Technologies
™
ATM Physical Interface (PHY) Devices
28250-DSH-002-C
CX28250