cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 54

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

2.0 Functional Description
2.3 SONET/SDH Framer and Overhead Processor
Table 2-6. H1, H2, and H3 Functions
2-18
H1-1 Transmit
H1-2 Transmit
H1-3 Transmit
H2-1 Transmit
H2-2 Transmit
H2-3 Transmit
H3-1 Transmit
H3-2 Transmit
H3-3 Transmit
2.3.3.1 H1, H2, and H3
2.3.3.2 Loss of Pointer
Overhead Byte
STS-3c Value
(in hex)
0A
62
93
93
00
00
00
FF
FF
Bytes H1, H2, and H3 in the STS-3c/STM-1 frame are fixed on the transmit side
to locate path overhead byte J1 immediately after the Z0
Overhead. The receive side performs all processing according to GR-253.
A Loss of Pointer (LOP) condition is declared when eight frames of invalid H1,
H2 octets are detected. This condition is cleared when three valid H1, H2 pointer
frames occur. LOP is described in register RXLIN (0x46) bit 7.
STM-1 Value
Mindspeed Technologies
(in hex)
6A
93
93
0A
00
00
00
FF
FF
FF hex is inserted via line AIS control bit, InsLnAIS (bit 3) in the TXLIN
register (0x0D). 33 hex is inserted for invalid pointer via control bit
DisPntr (bit 6) in the TXLIN register (0x0D).
FF hex is inserted via line AIS control bit, InsLnAIS (bit 3) in the TXLIN
register (0x0D).
FF hex is inserted via line AIS control bit, InsLnAIS (bit 3) in the TXLIN
register (0x0D).
FF hex is inserted via line AIS control bit, InsLnAIS (bit 3) in the TXLIN
register (0x0D). 33 is inserted for invalid pointer via control bit
DisPntr (bit 6) in the TXLIN register (0x0D).
register (0x0D).
register (0x0D).
FF hex is inserted via line AIS control bit, InsLnAIS (bit 3) in the TXLIN
register (0x0D).
FF hex is inserted via line AIS control bit, InsLnAIS (bit 3) in the TXLIN
register (0x0D).
FF hex is inserted via line AIS control bit, InsLnAIS (bit 3) in the TXLIN
register (0x0D).
FF hex is inserted via line AIS control bit, InsLnAIS (bit 3) in the TXLIN
FF hex is inserted via line AIS control bit, InsLnAIS (bit 3) in the TXLIN
™
Error Conditions
ATM Physical Interface (PHY) Devices
2
byte of the Section
28250-DSH-002-C
CX28250