cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 56

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

2.0 Functional Description
2.3 SONET/SDH Framer and Overhead Processor
Table 2-7. Signal Fail/Signal Degrade
2-20
NOTE(S):
Mindspeed recommends setting the logic reset bit when changing values.
2.3.3.4 APS Threshold
SD Thresh (bits 3-0)
SF Thresh (bits 7-4)
0
9
h
In the CX28250-23 and earlier versions, the SF/SD thresholds should not be changed during alarm conditions.
h
4
5
6
7
8
to 3
to F
h
h
h
h
h
h
h
Threshold
Detection
10
10
10
10
10
10
10
Automatic Protection Switching (APS) thresholds are monitored by estimating
the incoming Bit Error Rate (BER) and setting an alarm status bit and interrupt
when the programmed threshold is crossed. Two thresholds are supported: one for
Signal Degrade (SD) and one for Signal Fail (SF). Each threshold is
programmable for BER levels from 10
(0x09).
APSTHRESH. The alarm clearing threshold and observation time are
automatically set to 1/10 of the programmed alarm detection threshold.
shown in
implementation estimates the incoming BER to a >95% confidence level by
observing the number of errors per frame as monitored by the B2 line BIP bytes.
Table 2-11
programmed threshold level. In addition, Table 2-8 describes the actual
observation time implemented by the CX28250 threshold monitor. This time is
the maximum interval for the CX28250 to notify via status/interrupt that the
programmed threshold has been crossed. These alarm notification times allow
software time to process the interrupt and initiate the switching function within
the required switch initiation time.
notification takes place in the amount of time listed for the threshold that matches
the incoming BER. For example, if the SF threshold is programmed to monitor
for BER at a level of 10
BER is 10
end of the 16 ms window. This allows switch initiation to begin based on the
actual incoming BER level versus the programmed level as required by Bellcore
Standard GR-000253-CORE. Alarm clearing (when the BER drops below 1/10 of
the programmed threshold) requires observation of the BER for the entire
duration of the window as listed for the programmed threshold level. Interrupts
occur both when the detection threshold is crossed (BER exceeds programmed
threshold) and when the alarm is cleared (BER is below 1/10 of the programmed
threshold).
-3
-4
-5
-6
-7
-8
-9
The implementation supports the APS switch initiation time requirements
If the incoming BER is actually higher than the programmed threshold,
Table 2-7
Mindspeed Technologies
Figure 2-9
Threshold
-3
Clearing
describes the required confidence interval for estimating BER versus
10
10
10
10
10
10
10
the SF status/interrupt is set within 1 ms instead of waiting until the
-10
-4
-5
-6
-7
-8
-9
describes the programming range for the thresholds in
(from Bellcore Standard GR-253-CORE). The
-5
95% Confidence
(notification time 16 ms or less) but the actual incoming
Interval
6.45 ms
64.5 ms
64.5 µs
645 ms
645 µs
6.45 s
64.5 s
-3
™
to 10
Observation Time
ATM Physical Interface (PHY) Devices
-9
CX28250
in the APSTHRESH register
16.384 s
128 ms
2.048 s
16 ms
131 s
1 ms
2 ms
28250-DSH-002-C
Required Switch
Initiation Time
100 ms
13 ms
667 s
8 ms
10 s
83 s
1 s
CX28250