cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 135

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

CX28250
ATM Physical Interface (PHY) Devices
0x18—RXC2 (Receive C2 Overhead Status Register)
The RXC2 register provides C2 overhead status. This byte is allocated to identify the construction and content
of the STS-level SPE, and for STS Path Defect Indication (PDI-P). PDI-P indicates to downstream equipment
that there is a payload defect.
0x49—RXCELL (Receive Cell Status Register)
The RXCELL register contains status for the cell alignment, header error correction, and header screening
functions in the cell receiver.
28250-DSH-002-C
NOTE(S):
(1)
(2)
Bit
Bit
This status reflects the current state of the circuit.
This status shows an event that has occurred since the register was last read.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
x
x
x
0
x
x
x
x
x
x
x
x
x
x
x
x
NonZerGFC
NonMatch
CellRcvd
IdleRcvd
HECCorr
HECDet
LOCD
RxC2[1]
RxC2[2]
RxC2[3]
RxC2[4]
RxC2[5]
RxC2[6]
RxC2[7]
RxC2[8]
Name
Name
—
(1)
(2)
(2)
(2)
(2)
(2)
(2)
Receive value for C2 Overhead Octet—bit 1 (MSB)
Receive value for C2 Overhead Octet—bit 2
Receive value for C2 Overhead Octet—bit 3
Receive value for C2 Overhead Octet—bit 4
Receive value for C2 Overhead Octet—bit 5
Receive value for C2 Overhead Octet—bit 6
Receive value for C2 Overhead Octet—bit 7
Receive value for C2 Overhead Octet—bit 8 (LSB)
When a logic 1 is read, this bit indicates that there is a Loss of Cell Delineation.
When a logic 1 is read, this bit indicates that an uncorrected HEC Error was detected.
When a logic 1 is read, this bit indicates that a HEC Error was corrected.
Reserved, set to 0.
When a logic 1 is read, this bit indicates that a cell with a header matching the receive
header value and mask criteria was received.
When a logic 1 is read, this bit indicates that a cell with a header matching the receive
idle cell header value and mask criteria was received.
When a logic 1 is read, this bit indicates that a cell with a header not matching either
the receive cell or idle cell criteria was received.
When a logic 1 is read, this bit indicates that a cell with a Non-zero GFC field in the
header was received.
Mindspeed Technologies
Description
Description
™
4.0 Registers
4.1 Registers
4-37