cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 134

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

4.0 Registers
4.1 Registers
0x3F—PTHINT (Receive Path Interrupt Indication Status Register)
The PTHINT register indicates that a change of status has occurred within its affiliated status signals.
0x4A—RXAPS (Receive APS Status Register)
The RXAPS register contains status information for the receiver APS functions.
4-36
NOTE(S):
(1)
(2)
NOTE(S):
(1)
(2)
Bit
Bit
Dual event—A 0 –> 1 and 1–> 0 transition on the corresponding status bit causes this interrupt to occur provided that this
interrupt has been enabled by the corresponding enable bit. Reading the interrupt register clears the interrupt.
Single event—A 0 –> 1 transition on the corresponding status bit causes this interrupt to occur provided that this interrupt has
been enabled by the corresponding enable bit. Reading the interrupt register clears the interrupt.
This status reflects the current state of the circuit.
For the CX28250-23, the PSBF bit is cleared upon reading. For the CX28250-26, the PSBF bit reflects the current state of the
circuit.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
0
0
0
0
0
0
x
x
x
x
x
x
x
x
x
x
PthTraceInt
SigDegrade
Uneq-PInt
B3Degrade
PLM-PInt
RDI-PInt
AIS-PInt
B3ErrInt
REI-PInt
PSBF
SigFail
B3Fail
Name
Name
—
—
—
—
(1)(2)
(1)
(1)
(2)
(1)
(2)
(2)
(1)
(1)
(2)
(1)
(1)
When a logic 1 is read, this bit indicates that an AIS-P Interrupt has occurred.
When a logic 1 is read, this bit indicates that an RDI-P Interrupt has occurred.
When a logic 1 is read, this bit indicates that a B3 Error Interrupt has occurred.
When a logic 1 is read, this bit indicates that a REI-P Interrupt has occurred.
When a logic 1 is read, this bit indicates that a PLM-P Interrupt has occurred. This
means that the contents of Path Overhead byte C2 is not equal to 13 hex for ATM
mapping.
When a logic 1 is read, this bit indicates that an Uneq-P Interrupt has occurred. This
means that the contents of Path Overhead byte C2 is equal to 0.
When a logic 1 is read, this bit indicates that a Path Trace Interrupt has occurred.
Reserved, set to 0.
Reserved, set to 0.
Reserved, set to 0.
Reserved, set to 0.
When a logic 1 is read, this bit indicates a Protection Byte Switching Failure (PSBF).
When a logic 1 is read, this bit indicates that the B3 error count exceeded the
programmed threshold. This bit is only valid for the CX28250-26 and above.
When a logic 1 is read, this bit indicates that the B3 error count exceeded the
programmed threshold. This bit is only valid for the CX28250-26 and above.
When a logic 1 is read, this bit indicates a Signal Failure (SF).
When a logic 1 is read, this bit indicates a Signal Degradation (SD).
Mindspeed Technologies
Description
Description
™
ATM Physical Interface (PHY) Devices
28250-DSH-002-C
CX28250