cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 44

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

2.0 Functional Description
2.2 Clock Circuits
Figure 2-6. Bellcore GR-253-CORE Jitter Specifications
2-8
0.15UI
1.5UI
15UI
Jitter Tolerance
Jitter Generation:
The Jitter Generation shall be less than 0.01 UI
10 Hz 30 Hz 300 Hz
6.5 kHz
2.2 Clock Circuits
The clock circuit has a receiver section and a transmit section. The transmit
section synthesizes the 155.52 MHz clock used for transmitting data. One of three
clock sources can be selected by bits 3 and 4 of the CLKREC register (0x01).
clock from the incoming NRZ data stream. The clock recovery circuit requires the
19.44 MHz clock from an independent external source that meets 20 ppm
accuracy. When no NRZ data is present or when the signal detect input (LSigDet)
is low, indicating that the signal has been lost by the optical transceiver, the
receive clock recovery circuit free-runs at a nominal 155.52 MHz so that there is
always a receive clock present for the receive data path and the transmit path for
loop-timed applications.
according to Bellcore GR-253 (see
much jitter the receiver can tolerate and still extract the correct data from the
incoming signal. Jitter transfer is the maximum amount of jitter that any device is
allowed to add to the data stream.
Slope = -20 dB/decade
• By default, this clock is synthesized from the 19.44 MHz LPLLClk
• If a 155.52 MHz clock is provided, it can be used directly as the transmit
• The clock can be synthesized from the received data via the CDR section.
The receiver section uses an internal Phase Locked Loop (PLL) to recover the
The recovered clock meets jitter tolerance and jitter transfer specifications
reference input pin.
clock (bypassing synthesis altogether). The external clock must be
accurate to within 20 ppm of 155.52 MHz.
65 kHz
Mindspeed Technologies
rms
0.1dB
Jitter Transfer
and shall also be less than 0.10 UI
Figure
™
130 kHz
2-6). Jitter tolerance is defined as how
ATM Physical Interface (PHY) Devices
Slope = -20 dB/decade
pp
.
28250-DSH-002-C
500035_009
CX28250