cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 26

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

1.0 Product Description
1.4 CX28250 Pinout and Pin Descriptions
Table 1-1. CX28250 Pin Definitions (4 of 12)
1-10
MW/R*,
MRd*
MAs*, MWr*
MAddr[6]
MAddr[5]
MAddr[4]
MAddr[3]
MAddr[2]
MAddr[1]
MAddr[0]
Pin Label
Microprocessor
Write/Read, Read
Control
Microprocessor
Address Strobe,
Write Control
Microprocessor
Address Bus
Signal Name
Mindspeed Technologies
No.
C2
D2
G2
E3
E4
F2
F1
F3
F4
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
I/O
I
I
I
I
I
I
I
I
I
When MSyncMode is set to a logic 1, this pin is a
read/write control pin. In this mode, when MW/R* is
set to a logic 1, a write access is enabled, and the
MData[7:0] pin values are written to the memory
location indicated by the MAddr[6:0] pins. Also in this
mode, when MW/R* is set to a logic 0, a read access
is enabled and the memory location indicated by the
MAddr[6:0] pins is read and its value placed on the
MData[7:0] pins. Both read and write accesses
assume the device is chip selected (MCs* = 0), the
address is valid (MAs* = 0), and the device is not
being reset (Reset* = 1).
read control pin. In this mode, when Rd* is set to a
logic 0, a read access is enabled and the memory
location indicated by the MAddr[6:0] pins is read and
its value placed on the MData[7:0] pins. The read
access assumes the device is chip selected (MCs* =
0), a write access is not being requested (MWr* = 1),
and the device is not being reset (Reset* = 1).
When MSyncMode is set to a logic 1, this pin is an
address strobe pin. When the MAs* pin is set to a
logic 0, it indicates a valid address, MAddr[6:0]. This
signal is used to qualify read and write accesses.
write control pin. When MWr* is set to a logic 0, a
write access is enabled and the MData[7:0] pin values
are written to the memory location indicated by the
MAddr[6:0] pins. The write access assumes the
device is chip selected (MCs* = 0), a read access is
not being requested (MRd* = 1), and the device is not
being reset (Reset* = 1).
These seven bits are an address input for identifying
the register that is accessed.
When MSyncMode is set to a logic 0, this pin is a
When MSyncMode is set to a logic 0, this pin is a
™
ATM Physical Interface (PHY) Devices
Description
28250-DSH-002-C
CX28250