cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 149

• Manufacturer Part Number: cx28250
• Description: Cx28250 Atm Physical Interface Phy Devices
• Manufacturer: Mindspeed Technologies

CX28250
ATM Physical Interface (PHY) Devices
0x1B—RXZ02 (Receive Section Z0
The register contains the value of the received Z0
0x3D—SECINT (Receive Section Interrupt Indication Status Register)
The SECINT register indicates that a change of status has occurred within its affiliated status signals.
28250-DSH-002-C
NOTE(S):
(1)
(2)
Bit
Bit
Dual event—Either a 0–> 1 or a 1 –> 0 transition on the corresponding status bit causes this interrupt to occur provided that
this interrupt has been enabled by the corresponding enable bit. Reading the interrupt register clears the interrupt.
Single event—A 0–> 1 transition on the corresponding status bit causes this interrupt to occur provided that this interrupt has
been enabled by the corresponding enable bit. Reading the interrupt register clears the interrupt.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
x
x
x
x
x
x
x
0
0
0
0
0
0
0
0
0
SecTraceInt
SigDetInt
B1ErrInt
LOSInt
OOFInt
LOLInt
LOFInt
RxZ02[7]
RxZ02[6]
RxZ02[5]
RxZ02[4]
RxZ02[3]
RxZ02[2]
RxZ02[1]
RxZ02[0]
Name
Name
—
(1)
(1)
(1)
(1)
(2)
(1)
(2)
When a logic 1 is read, this bit indicates that a Signal Detect Interrupt has occurred.
When a logic 1 is read, this bit indicates that a Loss of Lock Interrupt has occurred.
When a logic 1 is read, this bit indicates that a Loss of Signal Interrupt has occurred.
When a logic 1 is read, this bit indicates that a Out of Frame Interrupt has occurred.
When a logic 1 is read, this bit indicates that a Loss of Frame Interrupt has occurred.
When a logic 1 is read, this bit indicates that a Section BIP Error Interrupt has
occurred.
When a logic 1 is read, this bit indicates that a Section Trace Interrupt has occurred.
Reserved, set to 0.
Receive Z0
Receive Z0
Receive Z0
Receive Z0
Receive Z0
Receive Z0
Receive Z0
Receive Z0
Mindspeed Technologies
2
Overhead Register)
2
2
2
2
2
2
2
2
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
2
overhead octet.
Description
Description
™
4.0 Registers
4.1 Registers
4-51